Pixel array
Abstract
Disclosed is a pixel array. The pixel array includes multiple pixel driving circuits and multiple light-emitting diodes. The pixel driving circuits are individually coupled to one of multiple scan lines to receive a scan signal, coupled to one of multiple light-emitting lines to receive a light-emitting signal, and coupled to one of multiple data lines to receive a pixel data. The light-emitting diodes are arranged in an array. An anode of a first light-emitting diode of the light-emitting diodes is coupled to one of the pixel driving circuits, and a cathode of the first light-emitting diode is coupled to an anode of a second light-emitting diode of the light-emitting diodes of the same color as the first light-emitting diode. A cathode of the second light-emitting diode receives a system low voltage.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A pixel array, comprising:
a plurality of pixel driving circuits, individually coupled to one of a plurality of scan lines to receive a scan signal, coupled to one of a plurality of light-emitting lines to receive a light-emitting signal, and coupled to one of a plurality of data lines to receive a pixel data; a plurality of light-emitting diodes, arranged in an array, wherein an anode of a first light-emitting diode of the plurality of light-emitting diodes is coupled to a first pixel driving circuit of the plurality of pixel driving circuits, and a cathode of the first light-emitting diode is coupled to an anode of a second light-emitting diode of the plurality of light-emitting diodes of a same color as the first light-emitting diode, wherein a cathode of the second light-emitting diode receives a system low voltage; a first series connection transistor, connected in series between the cathode of the first light-emitting diode and the anode of the second light-emitting diode; a first bypass transistor, connected in series between the cathode of the first light-emitting diode and the system low voltage; and a second bypass transistor, connected in series between a third pixel driving circuit of the plurality of pixel driving circuits and the anode of the second light-emitting diode, wherein when the first series connection transistor is turned on, the first bypass transistor and the second bypass transistor are not turned on, and when the first bypass transistor and the second bypass transistor are turned on, the first series connection transistor is not turned on.
2 . The pixel array according to claim 1 , wherein the cathode of the first light-emitting diode is coupled to the anode of the second light-emitting diode along a first direction in which the plurality of scan lines extend.
3 . The pixel array according to claim 1 , wherein the cathode of the first light-emitting diode is coupled to the anode of the second light-emitting diode along a direction opposite to a first direction in which the plurality of scan lines extend.
4 . The pixel array according to claim 1 , wherein the cathode of the first light-emitting diode is coupled to the anode of the second light-emitting diode along a second direction in which the plurality of data lines extend.
5 . The pixel array according to claim 1 , wherein the cathode of the first light-emitting diode is coupled to the anode of the second light-emitting diode along a direction opposite to a second direction in which the plurality of data lines extend.
6 . The pixel array according to claim 1 , wherein the cathode of the first light-emitting diode is coupled to the anode of the second light-emitting diode along an angular direction between a first direction in which the plurality of scan lines extend and a second direction in which the plurality of data lines extend.
7 . The pixel array according to claim 1 , wherein the cathode of the first light-emitting diode is coupled to the anode of the second light-emitting diode along an angular direction between a direction opposite to a first direction in which the plurality of scan lines extend and a second direction in which the plurality of data lines extend.
8 . The pixel array according to claim 1 , wherein the cathode of the first light-emitting diode is coupled to the anode of the second light-emitting diode along an angular direction between a first direction in which the plurality of scan lines extend and a direction opposite to a second direction in which the plurality of data lines extend.
9 . The pixel array according to claim 1 , wherein the cathode of the first light-emitting diode is coupled to the anode of the second light-emitting diode along an angular direction between a direction opposite to a first direction in which the plurality of scan lines extend and a direction opposite to a second direction in which the plurality of data lines extend.
10 . The pixel array according to claim 1 , wherein the first light-emitting diode is one of a red light-emitting diode and a green light-emitting diode.
11 . The pixel array according to claim 1 , wherein an anode of a third light-emitting diode of the plurality of light-emitting diodes of a different color from the first light-emitting diode is coupled to a second pixel driving circuit of the plurality of pixel driving circuits, and a cathode of the third light-emitting diode is coupled to an anode of a fourth light-emitting diode of the plurality of light-emitting diodes of a same color as the third light-emitting diode, wherein a cathode of the fourth light-emitting diode receives the system low voltage.
12 . The pixel array according to claim 11 , wherein the first light-emitting diode and the third light-emitting diode are individually a red light-emitting diode and a blue light-emitting diode.
13 . The pixel array according to claim 1 further comprising:
a second series connection transistor, connected in series between a cathode of a third light-emitting diode different from the first light-emitting diode of the plurality of light-emitting diodes and an anode of a fourth light-emitting diode of the same color as the third light-emitting diode, wherein an anode of the third light-emitting diode is coupled to a fourth pixel driving circuit of the plurality of pixel driving circuits, and a cathode of the fourth light-emitting diode receives the system low voltage;
a third bypass transistor, connected in series between the cathode of the third light-emitting diode and the system low voltage; and
a fourth bypass transistor, connected in series between a fifth pixel driving circuit of the plurality of pixel driving circuits and the anode of the fourth light-emitting diode,
wherein when the second series connection transistor is turned on, the third bypass transistor and the fourth bypass transistor are not turned on, and when the third bypass transistor and the fourth bypass transistor are turned on, the second series connection transistor is not turned on.
14 . The pixel array according to claim 13 , wherein the first series connection transistor and the second series connection transistor jointly receive a series connection enable signal, and the first bypass transistor, the second bypass transistor, the third bypass transistor, and the fourth bypass transistor jointly receive a series connection disable signal.
15 . The pixel array according to claim 14 , wherein when a display device applying the pixel array is located in a line of sight of a user, the series connection enable signal is enabled and the series connection disable signal is disabled, when the display device applying the pixel array is located out of the line of sight of the user, the series connection enable signal is disabled and the series connection disable signal is enabled.
16 . The pixel array according to claim 13 , further comprising a plurality of display areas, wherein the first series connection transistor in a first display area of the plurality of display areas receives a first series connection enable signal, the second series connection transistor in a second display area of the plurality of display areas receives a second series connection enable signal independent of the first series connection enable signal, the first bypass transistor and the second bypass transistor in the first display area jointly receive a first series connection disable signal, and the third bypass transistor and the fourth bypass transistor in the second display area jointly receive a second series connection disable signal independent of the first series connection disable signal.
17 . The pixel array according to claim 16 , wherein when the first display area is determined to be a display hot spot based on an image data, the first series connection enable signal is enabled and the first series connection disable signal is disabled, when the first display area is determined not to be the display hot spot, the first series connection enable signal is disabled and the first series connection disable signal is enabled, when the second display area is determined to be the display hot spot based on the image data, the second series connection enable signal is enabled and the second series connection disable signal is disabled, when the second display area is determined not to be the display hot spot, the second series connection enable signal is disabled and the second series connection disable signal is enabled.
18 . The pixel array according to claim 17 , wherein when the first display area is determined to display a dynamic image based on the image data, the first display area is determined to be the display hot area, when the second display area is determined to display the dynamic image based on the image data, the second display area is determined to be the display hot area.
19 . The pixel array according to claim 1 , wherein the plurality of light-emitting diodes comprise a plurality of micro light-emitting diodes.Join the waitlist — get patent alerts
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