Active matrix substrate and liquid crystal display device
Abstract
An active matrix substrate includes pixel regions each including a pixel electrode and an oxide semiconductor TFT including an oxide semiconductor layer. Each pixel electrode is electrically connected to one of adjacent two of source bus lines. The oxide semiconductor layer in the oxide semiconductor TFT of each pixel region overlaps the pixel electrode of a first adjacent pixel region. The pixel electrode of the each pixel region partially overlaps the oxide semiconductor layer in a second adjacent pixel region. The source bus lines include first and second source bus lines adjacent to each other. Pixels sets each including two pixel regions whose pixel electrodes are connected to the first source bus line and pixel sets each including two pixel regions whose pixel electrodes are connected to the second source bus line are arranged alternately between the first and second source bus lines.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . An active matrix substrate comprising:
a substrate having a plurality of pixel regions arranged in a row direction and a column direction in a matrix form; a plurality of gate bus lines supported on the substrate and extending in the row direction; and a plurality of source bus lines supported on the substrate and extending in the column direction, wherein each of the pixel regions is defined by corresponding adjacent two of the gate bus lines and corresponding adjacent two of the source bus lines, wherein the each of the pixel regions includes a pixel electrode and an oxide semiconductor TFT including an oxide semiconductor layer serving as an active layer, the pixel electrode being electrically connected to a first one of the corresponding adjacent two of the source bus lines through the oxide semiconductor TFT, wherein the plurality of source bus lines include a first source bus line and a second source bus line that are adjacent to each other, wherein pixels sets each including two of the pixel regions whose pixel electrodes are electrically connected to the first source bus line and pixel sets each including two of the pixel regions whose pixel electrodes are electrically connected to the second source bus line are arranged alternately between the first source bus line and the second source bus line, wherein β(A−B) that is a β value of the each of the pixel regions is determined from formula (1) below using own source parasitic capacitance Csd(A) formed between the pixel electrode of the each of the pixel regions and the first one of the corresponding adjacent two of the source bus lines, other source parasitic capacitance Csd(B) formed between the pixel electrode of the each of the pixel regions and a second one of the corresponding adjacent two of the source bus lines, and pixel capacitance Cpi:
β
(
A
-
B
)
=
{
Csd
(
A
)
-
Csd
(
B
)
}
/
Cpi
,
and
(
1
)
wherein each of the pixel sets is designed such that
β
1
(
A
-
B
)
>
0
,
β
2
(
A
-
B
)
<
0
,
and
❘
"\[LeftBracketingBar]"
β
1
(
A
-
B
)
+
β
2
(
A
-
B
)
❘
"\[RightBracketingBar]"
≤
0.001
are satisfied, where β 1 (A−B) and β 2 (A−B) are β values of the respective two pixel regions in the each of the pixel sets.
2 . The active matrix substrate according to claim 1 , wherein the each of the pixel sets is designed such that β 1 (A−B) and β 2 (A−B) that are the β values of the two pixel regions satisfy
❘
"\[LeftBracketingBar]"
β
1
(
A
-
B
)
❘
"\[RightBracketingBar]"
>
0.001
and
❘
"\[LeftBracketingBar]"
β
2
(
A
-
B
)
❘
"\[RightBracketingBar]"
>
0.001
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