Semiconductor device tester

Abstract

A test system and method of testing are provided. In some embodiments, a system for testing an integrated circuit package includes a device tester. The device tester includes a socket, a cylinder head unit engageable with the socket, and a pressure regulator. The socket includes a first pressure cylinder configured to engage a first region of the integrated circuit package and a second pressure cylinder configured to engage a second region of the integrated circuit package. The pressure regulator is configured to provide at gas at a first pressure to the first pressure cylinder and to provide the gas at a second pressure different than the first pressure to the second pressure cylinder.

What is claimed is: 
     
         1 . A system for testing an integrated circuit package, comprising:
 a device tester, comprising:
 a socket; 
 a cylinder head unit engageable with the socket, comprising:
 a first pressure cylinder configured to engage a first region of the integrated circuit package; and 
 a second pressure cylinder configured to engage a second region of the integrated circuit package; 
 
 a pressure regulator configured to provide a gas at a first pressure to the first pressure cylinder and to provide the gas at a second pressure different than the first pressure to the second pressure cylinder; 
 a first gas inlet connected between the pressure regulator and the cylinder head unit; and 
 a second gas inlet connected between the pressure regulator and the cylinder head unit, wherein the gas comprises at least one of air or an inert gas. 
   
     
     
         2 . The system of  claim 1 , wherein the cylinder head unit comprises:
 a third pressure cylinder; and   a pressure cavity in fluid communication with the first pressure cylinder and the third pressure cylinder.   
     
     
         3 . The system of  claim 1 , wherein:
 the first pressure is based on a pin count of a first semiconductor die of the integrated circuit package in the first region, and   the second pressure is based on a pin count of a second semiconductor die of the integrated circuit package in the second region.   
     
     
         4 . The system of  claim 1 , wherein:
 the socket comprises a conductive pin having an associated pin force for deflecting the conductive pin, and   the first pressure is based on a pin count of a first semiconductor die of the integrated circuit package in the first region and the associated pin force.   
     
     
         5 . The system of  claim 4 , wherein:
 the first pressure corresponds to a first force that is a fraction of a maximum force defined by the pin count and the associated pin force.   
     
     
         6 . The system of  claim 1 , comprising:
 a prober configured to configure the first pressure and the second pressure in the device tester, wherein:
 the first pressure and the second pressure are employed by the device tester during a test of the integrated circuit package, 
 the prober is configured to provide a third pressure and a fourth pressure for a preliminary engagement between the integrated circuit package and the device tester, 
 the pressure regulator is configured to provide the gas at the third pressure to the first pressure cylinder and to provide the gas at the fourth pressure to the second pressure cylinder during the preliminary engagement, 
 the third pressure is less than the first pressure, and 
 the fourth pressure is less than the second pressure. 
   
     
     
         7 . The system of  claim 1 , comprising:
 a prober configured to configure the first pressure and the second pressure in the device tester, wherein:
 the first pressure and the second pressure are employed by the device tester during a first test of the integrated circuit package, 
 the prober is configured to provide a third pressure and a fourth pressure for a second test of the integrated circuit package responsive to a fail result of the first test, 
 the pressure regulator is configured to provide the gas at the third pressure to the first pressure cylinder and to provide the gas at the fourth pressure to the second pressure cylinder during the second test, 
 the third pressure is greater than the first pressure, and 
 the fourth pressure is greater than the second pressure. 
   
     
     
         8 . A method, comprising:
 interfacing an integrated circuit package in a socket of a device tester;   providing a first pressure to a first pressure cylinder to apply a first force to a first region of the integrated circuit package using the first pressure cylinder;   providing a second pressure to a second pressure cylinder to apply a second force different than the first force to a second region of the integrated circuit package using the second pressure cylinder;   providing the first pressure to a third pressure cylinder to apply a third force to a third region of the integrated circuit package; and   performing a first test of the integrated circuit package using the device tester.   
     
     
         9 . The method of  claim 8 , comprising:
 configuring the first pressure based on a pin count of a first semiconductor die of the integrated circuit package in the first region, and   configuring the second pressure based on a pin count of a second semiconductor die of the integrated circuit package in the second region.   
     
     
         10 . The method of  claim 8 , wherein:
 the socket comprises a conductive pin having an associated pin force for deflecting the conductive pin, and   the method comprises configuring the first pressure based on a pin count of a first semiconductor die of the integrated circuit package in the first region and the associated pin force.   
     
     
         11 . The method of  claim 10 , wherein configuring the first pressure comprises:
 configuring the first pressure to provide the first force as a fraction of a maximum force defined by the pin count and the associated pin force.   
     
     
         12 . The method of  claim 11 , wherein configuring the first pressure comprises:
 configuring the first pressure based on a surface area of the first pressure cylinder.   
     
     
         13 . The method of  claim 8 , comprising:
 providing a third pressure less than the first pressure to the first pressure cylinder to apply a fourth force to the first region of the integrated circuit package during a preliminary engagement between the socket and the integrated circuit package; and   providing a fourth pressure less than the second pressure to the first pressure cylinder to apply a fifth force to the second region of the integrated circuit package during the preliminary engagement.   
     
     
         14 . The method of  claim 13 , comprising:
 modifying the first pressure and the second pressure prior to performing the first test based on the preliminary engagement.   
     
     
         15 . The method of  claim 8 , comprising:
 responsive to a fail result of the first test:
 applying a fourth force greater than the first force to the first region of the integrated circuit package using the first pressure cylinder; 
 applying a fifth force greater than the second force to the second region of the integrated circuit package using the second pressure cylinder; and 
 performing a second test of the integrated circuit package using the device tester. 
   
     
     
         16 . A system, comprising:
 a socket;   a cylinder head unit engageable with the socket, comprising:
 a first pressure cylinder configured to engage a first region of an integrated circuit package; 
 a second pressure cylinder configured to engage a second region of the integrated circuit package; 
 a third pressure cylinder configured to engage a third region of the integrated circuit package; 
 a first pressure cavity in fluid communication with the first pressure cylinder; and 
 a second pressure cavity in fluid communication with the second pressure cylinder and the third pressure cylinder; and 
   a pressure regulator configured to provide a first pressure to the first pressure cavity and a second pressure different than the first pressure to the second pressure cavity.   
     
     
         17 . The system of  claim 16 , wherein:
 the first pressure is based on a pin count of a first semiconductor die of the integrated circuit package in the first region, and   the second pressure is based on a pin count of a second semiconductor die of the integrated circuit package in the second region.   
     
     
         18 . The system of  claim 16 , wherein:
 the socket comprises a conductive pin having an associated pin force for deflecting the conductive pin, and   the first pressure is based on a pin count of a first semiconductor die of the integrated circuit package in the first region and the associated pin force.   
     
     
         19 . The system of  claim 18 , wherein:
 the first pressure corresponds to a first force that is a fraction of a maximum force defined by the pin count and the associated pin force.   
     
     
         20 . The system of  claim 16 , comprising:
 a first gas inlet connected between the pressure regulator and the cylinder head unit; and   a second gas inlet connected between the pressure regulator and the cylinder head unit.