Contact structure and method of forming the same

Abstract

A semiconductor device includes a first die including a first stack of layers in a first region on a backside of the first die and a second stack of layers in a second region on the backside of the first die. The first stack of layers has a smaller number of different layers than the second stack of layers. A contact structure is formed in the first region on the backside of the first die. The contact structure extends through the first stack of layers and is configured to conductively connect a first conductive structure on a face side of the first die with a second conductive structure on the backside of the first die. The face side is opposite to the backside.

What is claimed is: 
     
         1 . A semiconductor device, comprising:
 a first die comprising:   a first stack of layers in a first region;   a second stack of layers in a second region, the first stack of layers having a smaller number of different layers than the second stack of layers;   a third stack of alternating gate layers and insulating layers in the second region, the first stack of layers being on a same side of the third stack with the second stack of layers;   a first conductive structure in the first region and extending along a first direction, the first conductive structure being on a same side of the first stack of layers with the third stack;   a second conductive structure in the first region, the second conductive structure and the third stack being disposed on opposite sides of the first stack of layers; and   a contact structure formed in the first region, the contact structure extending through the first stack of layers and being configured to conductively connect the first conductive structure with the second conductive structure.   
     
     
         2 . The semiconductor device of  claim 1 , wherein:
 the first stack of layers includes, in a sequence, a first layer, a replacement layer and a first insulating layer, and   the second stack of layers includes, in a sequence, the first layer, a second layer, a conductive layer, the replacement layer and the first insulating layer.   
     
     
         3 . The semiconductor device of  claim 2 , wherein:
 the first layer and the replacement layer have equivalent etching properties,   the second layer and the first layer have different etching properties, and   the conductive layer and the second layer have different etching properties.   
     
     
         4 . The semiconductor device of  claim 2 , wherein:
 the first layer and the replacement layer include a same conductive material.   
     
     
         5 . The semiconductor device of  claim 2 , wherein:
 the first layer includes doped silicon, and   the replacement layer includes doped silicon.   
     
     
         6 . The semiconductor device of  claim 1 , wherein:
 the contact structure comprises a conductive portion and a sidewall portion,   the conductive portion is configured to conductively connect with the first conductive structure, and   the sidewall portion is configured to insulate the conductive portion from the first stack of layers.   
     
     
         7 . The semiconductor device of  claim 6 , wherein:
 the conductive portion includes at least one of tungsten or aluminum.   
     
     
         8 . The semiconductor device of  claim 6 , wherein:
 the sidewall portion includes at least one of silicon oxide, silicon nitride, zirconium oxide, hafnium oxide, aluminum oxide or tantalum oxide.   
     
     
         9 . The semiconductor device of  claim 1 , further comprising:
 a second die bonded with the first die, the second die including a substrate and peripheral circuitry.   
     
     
         10 . The semiconductor device of  claim 1 , further comprising: a plurality of channel structures extending through the third stack. 
     
     
         11 . The semiconductor device of  claim 1 , further comprising:
 a shielding structure extending through at least one of the first stack of layers or the second stack of layers.   
     
     
         12 . The semiconductor device of  claim 11 , wherein:
 the shielding structure is positioned on a boundary of the first region and the second region.   
     
     
         13 . The semiconductor device of  claim 11 , wherein:
 the shielding structure includes an insulating material.   
     
     
         14 . The semiconductor device of  claim 6 , wherein:
 the sidewall portion of the contact structure and the first stack of layers are not integrally formed with each other.   
     
     
         15 . A memory system, comprising:
 a semiconductor device, comprising:
 a die including a contact structure in a first region; 
 a first stack of layers in the first region; 
 a second stack of layers in a second region, the first stack of layers having a smaller number of different layers than the second stack of layers; 
 a third stack of alternating gate layers and insulating layers in the second region, the first stack of layers being on a same side of the third stack with the second stack of layers; 
 a first conductive structure in the first region and extending along a first direction, the first conductive structure being on a same side of the first stack of layers with the third stack; and 
 a second conductive structure in the first region, the second conductive structure and the third stack being disposed on opposite sides of the first stack of layers, wherein the contact structure is configured to conductively connect the first conductive structure with the second conductive structure; and 
   a controller configured to control operations of the semiconductor device, the controller being connected with the semiconductor device.   
     
     
         16 . The memory system of  claim 15 , wherein:
 the first stack of layers includes, in a sequence, a first layer, a replacement layer and a first insulating layer, and   the second stack of layers includes, in a sequence, the first layer, a second layer, a conductive layer, the replacement layer and the first insulating layer.   
     
     
         17 . The memory system of  claim 16 , wherein:
 the first layer and the replacement layer have equivalent etching properties,   the second layer and the first layer have different etching properties, and   the conductive layer and the second layer have different etching properties.   
     
     
         18 . The memory system of  claim 16 , wherein:
 the first layer and the replacement layer include a same conductive material.   
     
     
         19 . The memory system of  claim 16 , wherein:
 the first layer includes doped silicon, and   the replacement layer includes doped silicon.   
     
     
         20 . The memory system of  claim 16 , wherein:
 the contact structure comprises a conductive portion and a sidewall portion,   the conductive portion is configured to conductively connect with the first conductive structure, and   the sidewall portion is configured to insulate the conductive portion from the first stack of layers.