Semiconductor structures having deep trench capacitor and methods for manufacturing the same

Abstract

A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a substrate having a first surface, a plurality of layers disposed on the first surface of the substrate. The plurality of layers includes a first nitride layer disposed on the first surface of the substrate, a first silicon-containing layer disposed on the first nitride layer, an intermediate nitride layer disposed on the first silicon-containing layer, a second silicon-containing layer disposed on the intermediate nitride layer, and a second nitride layer disposed on the second silicon-containing layer. In addition, the semiconductor structure includes a trench capacitor penetrating the plurality of layers and in contact with the substrate. The trench capacitor has a first portion having a first lateral surface and a second portion having a second lateral surface, and the first lateral surface has a slope different from that of the second lateral surface.

What is claimed is: 
     
       1. A method for manufacturing a semiconductor structure, comprising:
 providing a substrate; 
 forming a plurality of layers on the substrate, wherein the plurality of layers include: 
 a first nitride layer on the substrate; 
 a first silicon-containing layer on the first nitride layer; 
 an intermediate layer on the first silicon-containing layer; 
 a second silicon-containing layer on the intermediate layer; and 
 a second nitride layer on the second silicon-containing layer; 
 performing a first removal operation on the plurality of layers to form a trench, the trench penetrating the first nitride layer, the first silicon-containing layer, the intermediate layer, the second silicon-containing layer, and the second nitride layer, wherein the trench includes a first portion surrounded by the first silicon-containing layer and a second portion surrounded by the second silicon-containing layer; and 
 performing a second removal operation on the plurality of layers to expand the first portion of the trench; 
 wherein the substrate includes a conductive region exposed from the plurality of layers; 
 wherein the first silicon-containing layer includes a first region adjacent to the first nitride layer and a second region on the first region; 
 wherein the first region of the first silicon-containing layer has a first doping concentration, and the second region of the first silicon-containing layer has a second doping concentration greater than the first doping concentration; wherein the first region of the first silicon-containing layer has a thickness greater than that of the second region of the first silicon-containing layer. 
 
     
     
       2. The method of  claim 1 , further comprising:
 before the second removal operation, disposing a protective layer on a lateral surface of the trench and a top surface of the second nitride layer; and 
 performing a third removal operation on a portion of the protective layer, such that the first silicon-containing layer is exposed from the protective layer. 
 
     
     
       3. The method of  claim 2 , further comprising:
 after the second removal operation, removing the protective layer; and 
 forming a trench capacitor within the trench. 
 
     
     
       4. The method of  claim 3 , wherein forming the trench capacitor within the trench further comprises:
 forming a multilayered stack within the trench, wherein the multilayered stack includes: 
 a first conductive layer adjacent to the plurality of layers and in contact with the substrate; 
 a first dielectric layer on the first conductive layer; 
 an intermediate conductive layer on the first dielectric layer; 
 a second dielectric layer on the intermediate conductive layer; and 
 a second conductive layer on the second dielectric layer, disposing a contact on the multilayered stack. 
 
     
     
       5. The method of  claim 2 , wherein the protective layer is non-uniform. 
     
     
       6. The method of  claim 2 , wherein the protective layer covers a portion of a lateral surface of the trench. 
     
     
       7. The method of  claim 1 , wherein the conductive region of the substrate includes tungsten (W). 
     
     
       8. The method of  claim 1 , wherein the first silicon-containing layer includes a material different from that of the second silicon-containing layer, and the first silicon-containing layer includes borophosphosilicate glass (BPSG) and the second silicon-containing layer includes tetraethoxysilane (TEOS). 
     
     
       9. The method of  claim 1 , wherein a ratio of a height of the trench to a width of the trench is greater than 25, wherein the first portion of the trench has a first lateral surface, and the second portion of the trench has a second lateral surface, wherein the first lateral surface has a slope different from that of the second lateral surface. 
     
     
       10. The method of  claim 9 , wherein the first lateral surface of the first portion of the trench extends in a direction substantially perpendicular to the substrate. 
     
     
       11. The method of  claim 9 , wherein the second lateral surface of the second portion of the trench tapers in a direction from the second nitride layer to the first nitride layer.