Semiconductor integrated circuit

Abstract

A semiconductor integrated circuit includes a first control part included in a first region in which a first operation speed is permitted, a second control part included in a second region in which power supply is cut off in a power saving mode and in which an operation at a speed higher than the first operation speed is required, a functional part having a specific function, and a selection part selecting either a first path connecting the first control part and the functional part or a second path connecting the second control part and the functional part in response to a control signal.

What is claimed is: 
     
       1. A semiconductor integrated circuit comprising:
 a first control part included in a first region in which a first operation speed is permitted; 
 a second control part included in a second region in which power supply is cut off in a power saving mode and in which operation at a speed higher than the first operation speed is required; 
 a memory having a specific function; and 
 a selection part selecting either a first path connecting the first control part and the memory or a second path connecting the second control part and the memory in response to a control signal. 
 
     
     
       2. The semiconductor integrated circuit according to  claim 1 , wherein the memory and the selection part are disposed within the first region. 
     
     
       3. The semiconductor integrated circuit according to  claim 2 , wherein the first region other than the memory and the selection part is constituted by an element having a first threshold voltage, and the second region is constituted by an element having a second threshold voltage lower than the first threshold voltage. 
     
     
       4. The semiconductor integrated circuit according to  claim 2 , wherein the semiconductor integrated circuit operates in two modes: a normal mode in which power is supplied to an entirety of the semiconductor integrated circuit and a power saving mode in which power supply to the second region is cut off, and
 the selection part is constituted by a multiplexer, and the multiplexer selects the second path in the normal mode and selects the first path in the power saving mode. 
 
     
     
       5. The semiconductor integrated circuit according to  claim 2 , wherein the semiconductor integrated circuit operates in two modes: a normal mode in which power is supplied to an entirety of the semiconductor integrated circuit and a power saving mode in which power supply to the second region is cut off, and
 the selection part is constituted by an arbitration circuit, and the arbitration circuit selects the first path in accordance with access from the first control part and selects the second path in accordance with access from the second control part in the normal mode, and selects the first path in the power saving mode. 
 
     
     
       6. The semiconductor integrated circuit according to  claim 1 , wherein the memory and the selection part are disposed in a third region different from the first region and the second region. 
     
     
       7. The semiconductor integrated circuit according to  claim 6 , wherein the first region is constituted by an element having a first threshold voltage, and the second region is constituted by an element having a second threshold voltage lower than the first threshold voltage. 
     
     
       8. The semiconductor integrated circuit according to  claim 7 , wherein the third region other than the memory and the selection part is constituted by an element having the first threshold voltage. 
     
     
       9. The semiconductor integrated circuit according to  claim 6 , wherein the semiconductor integrated circuit operates in three modes: a normal mode in which power is supplied to an entirety of the semiconductor integrated circuit, a first power saving mode in which power supply to the second region is cut off, and a second power saving mode in which power supply to the first region is cut off, and
 the selection part is constituted by a multiplexer, and the multiplexer selects the second path in the normal mode and selects the first path in the first power saving mode, and selects the second path in the second power saving mode. 
 
     
     
       10. The semiconductor integrated circuit according to  claim 6 , wherein the semiconductor integrated circuit operates in three modes: a normal mode in which power is supplied to an entirety of the semiconductor integrated circuit, a first power saving mode in which power supply to the second region is cut off, and a second power saving mode in which power supply to the first region is cut off, and
 the selection part is constituted by an arbitration circuit, and the arbitration circuit selects the first path in accordance with access from the first control part and selects the second path in accordance with access from the second control part in the normal mode, the arbitration circuit selects the first path in the first power saving mode, and the arbitration circuit selects the second path in the second power saving mode. 
 
     
     
       11. The semiconductor integrated circuit according to  claim 1 , wherein the memory and the selection part are disposed within the first region. 
     
     
       12. The semiconductor integrated circuit according to  claim 11 , wherein the first region other than the memory and the selection part is constituted by an element having a first threshold voltage, and the second region is constituted by an element having a second threshold voltage lower than the first threshold voltage. 
     
     
       13. The semiconductor integrated circuit according to  claim 3 , wherein the semiconductor integrated circuit operates in two modes: a normal mode in which power is supplied to an entirety of the semiconductor integrated circuit and a power saving mode in which power supply to the second region is cut off, and
 the selection part is constituted by a multiplexer, and the multiplexer selects the second path in the normal mode and selects the first path in the power saving mode. 
 
     
     
       14. The semiconductor integrated circuit according to  claim 3 , wherein the semiconductor integrated circuit operates in two modes: a normal mode in which power is supplied to an entirety of the semiconductor integrated circuit and a power saving mode in which power supply to the second region is cut off, and
 the selection part is constituted by an arbitration circuit, and the arbitration circuit selects the first path in accordance with access from the first control part and selects the second path in accordance with access from the second control part in the normal mode, and selects the first path in the power saving mode. 
 
     
     
       15. The semiconductor integrated circuit according to  claim 1 , wherein the memory and the selection part are disposed in a third region different from the first region and the second region. 
     
     
       16. The semiconductor integrated circuit according to  claim 15 , wherein the first region is constituted by an element having a first threshold voltage, and the second region is constituted by an element having a second threshold voltage lower than the first threshold voltage. 
     
     
       17. The semiconductor integrated circuit according to  claim 16 , wherein the third region other than the memory and the selection part is constituted by an element having the first threshold voltage.