US12218249B2ActiveUtilityA1

Semiconductor device comprising oxide semiconductor layer containing a c-axis aligned crystal

Assignee: SEMICONDUCTOR ENERGY LABPriority: Dec 4, 2009Filed: Jul 28, 2023Granted: Feb 4, 2025
Est. expiryDec 4, 2029(~3.4 yrs left)· nominal 20-yr term from priority
H10D 86/60H10D 30/6755H10D 30/6757H10D 62/405H10D 99/00H10D 86/423H10D 62/80H10D 62/40H10D 30/6756H10D 30/6734H01L 29/78696H01L 29/78693H01L 29/78648H01L 29/66969H01L 29/24H01L 29/045H01L 29/04H01L 27/1225H01L 29/7869
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References
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Claims

Abstract

A semiconductor device includes an oxide semiconductor layer including a crystalline region over an insulating surface, a source electrode layer and a drain electrode layer in contact with the oxide semiconductor layer, a gate insulating layer covering the oxide semiconductor layer, the source electrode layer, and the drain electrode layer, and a gate electrode layer over the gate insulating layer in a region overlapping with the crystalline region. The crystalline region includes a crystal whose c-axis is aligned in a direction substantially perpendicular to a surface of the oxide semiconductor layer.

Claims

exact text as granted — not AI-modified
The invention claimed is: 
     
       1. A semiconductor device comprising:
 a first conductive layer; 
 a first insulating layer over the first conductive layer; 
 an oxide semiconductor layer including a channel formation region of a transistor, over the first insulating layer; and 
 a second conductive layer in contact with a top surface of the oxide semiconductor layer, 
 wherein the first conductive layer is configured to be a gate electrode of the transistor, 
 wherein the second conductive layer is configured to be a source electrode or a drain electrode of the transistor, 
 wherein the oxide semiconductor layer includes a first region overlapping the first conductive layer, a second region overlapping the first conductive layer and the second conductive layer, and a third region overlapping the second conductive layer, 
 wherein the first region includes a crystal grain whose c-axis is aligned, and 
 wherein the second region is closer to the first conductive layer than the first region. 
 
     
     
       2. The semiconductor device according to  claim 1 , further comprising a third conductive layer over the oxide semiconductor layer and the second conductive layer.

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