Scan testable through silicon VIAs

Abstract

In one example, an integrated circuit comprises a die. The die has a first surface and a second surface, the second surface opposite to the first surface. The die also includes: a first contact on the first surface and a second contact on the second surface; a through silicon via having a first end and a second end, the first end coupled to the first contact and the second end coupled to the second contact; and a scan cell having a control input, a response input, and a stimulus output, the response input coupled to the first end and the stimulus output coupled to the second end.

What is claimed is: 
     
       1. An integrated circuit comprising:
 a die having a first surface and a second surface, the second surface opposite to the first surface, the die including:
 a first contact on the first surface and a second contact on the second surface; 
 a through silicon via having a first end and a second end, the first end coupled to the first contact and the second end coupled to the second contact; and 
 a scan cell having a control input, a response input, and a stimulus output, the response input coupled to the first end and the stimulus output coupled to the second end. 
 
 
     
     
       2. The integrated circuit of  claim 1 , wherein the die includes a switch having a switch control input, a first terminal, a second terminal, and a third terminal, the first terminal is coupled to the first contact, the second terminal is coupled to the response input, the third terminal is coupled to the first end, and the switch is configured to:
 responsive to the switch control input having a first state, propagate a first signal between the first terminal and the third terminal; and 
 responsive to the switch control input having a second state, propagate a second signal between the third terminal and the second terminal. 
 
     
     
       3. The integrated circuit of  claim 1 , wherein the die includes a switch having a switch control input, a first terminal, a second terminal, and a third terminal, the first terminal is coupled to the second contact, the second terminal is coupled to the stimulus output, the third terminal is coupled to the second end, and the switch is configured to:
 responsive to the switch control input having a first state, propagate a first signal between the second terminal and the third terminal; and 
 responsive to the switch control input having a second state, propagate a second signal between the first terminal and the third terminal. 
 
     
     
       4. The integrated circuit of  claim 1 , wherein the first end is directly coupled to the first contact. 
     
     
       5. The integrated circuit of  claim 1 , wherein the second end is directly coupled to the second contact. 
     
     
       6. The integrated circuit of  claim 1 , wherein the die includes a buffer having a buffer input and a buffer output, the buffer input is coupled to the second contact and the buffer output is coupled to the second end. 
     
     
       7. The integrated circuit of  claim 6 , wherein the buffer has a switch control input, wherein the buffer is configured to:
 responsive to the switch control input having a first state, output a signal at the buffer input to the buffer output; and 
 responsive to the switch control input having a second state, disconnect the buffer output from the buffer input. 
 
     
     
       8. The integrated circuit of  claim 6 , wherein the buffer is a first buffer, the buffer input is a first buffer input, and the buffer output is a first buffer output; and
 the die further includes a second buffer having a second buffer input and a second buffer output, the second buffer input coupled to the first end, and the second buffer output coupled to the first contact. 
 
     
     
       9. The integrated circuit of  claim 8 , further comprising a switch coupled between the second buffer input and output. 
     
     
       10. The integrated circuit of  claim 1 , wherein the die includes a resistor and a switch coupled between the response input and the resistor, the switch has a switch control input and is configured to:
 responsive to the switch control input having a first state, connect the response input to the resistor; and 
 responsive to the switch control input having a second state, disconnect the response input from the resistor. 
 
     
     
       11. The integrated circuit of  claim 1 , wherein:
 the scan cell has a voltage reference input; and 
 the scan cell includes:
 a comparator having a comparator output and first and second comparator inputs, the first comparator input coupled to the response input, and the second comparator input coupled to the voltage reference input; and 
 a flip flop having a data input, a data output, and a clock input, the data input coupled to the comparator output, the data output coupled to the stimulus output, and the clock input coupled to the control input. 
 
 
     
     
       12. The integrated circuit of  claim 11 , wherein:
 the scan cell has a scan input and a scan output, the scan output coupled to the data output; and 
 the scan cell includes:
 a multiplexor having a multiplexor output, first and second multiplexor inputs, and a selection input, the first multiplexor input coupled to the comparator output, the second multiplexor input coupled to the scan input, and the multiplexor output coupled to the data input; and 
 a stimulus circuit having a circuit input, a circuit output, and a circuit control input, the circuit input coupled to the data output, the circuit output coupled to the stimulus output, and the circuit control input coupled to the control input. 
 
 
     
     
       13. The integrated circuit of  claim 12 , wherein the circuit input is a first circuit input, the stimulus circuit has second and third circuit inputs and is configured:
 responsive to the circuit control input having a first state, disconnect the circuit output from the first, second, and third circuit inputs; and 
 responsive to the circuit control input having a second state: 
 responsive to the first circuit input having a first state, output a first signal at the second circuit input to the circuit output; and 
 responsive to the first circuit input having a second state, output a second signal at the third circuit input to the circuit output. 
 
     
     
       14. The integrated circuit of  claim 12 , wherein:
 the scan cell is a first scan cell, the scan input is a first scan input, the control input is a first control input, and the scan output is a first scan output; 
 the die has a scan input terminal, a scan output terminal, and a control terminal, the scan input terminal is coupled to the first scan input, and the control terminal is coupled to the first control input; and 
 the die includes a second scan cell having a second scan input, a second scan output, and a second control input, the second scan input is coupled to the first scan output, the second scan output is coupled to the scan output terminal, and the second control input is coupled to the control terminal. 
 
     
     
       15. The integrated circuit of  claim 12 , wherein:
 the scan cell is a first scan cell, the scan input is a first scan input, the control input is a first control input, and the scan output is a first scan output; 
 the die has a test access port (TAP) including a TDI terminal, a TCK terminal, a TMS terminal, a TDO terminal, and a control output, the TDI terminal is coupled to the first scan input, and the control output is coupled to the first control input; and 
 the die includes a second scan cell having a second scan input, a second scan output, and a second control input, the second scan input is coupled to the first scan output, the second scan output is coupled to the TDO terminal, and the second control input is coupled to the control output. 
 
     
     
       16. The integrated circuit of  claim 1 , wherein:
 the die is a first die; 
 the through silicon via is a first through silicon via; 
 the scan cell is a first scan cell, the response input is a first response input, the stimulus output is a first stimulus output, the first scan cell also has a scan output; 
 the integrated circuit further comprises a second die having a third surface and a fourth surface, the third surface opposite to the fourth surface, the second die including:
 a third contact on the third surface and a fourth contact on the fourth surface, the third contact coupled to the second contact; 
 a second through silicon via having a third end and a fourth end, the third end coupled to the third contact and the fourth end coupled to the fourth contact; 
 a second scan cell having a second control input, a second response input, and a second stimulus output, the second response input coupled to the third end and the second stimulus output coupled to the fourth end; 
 the second scan cell is configured to provide a first signal at the second stimulus output; and 
 the first scan cell is configured to:
 receive the first signal at the first response input; and 
 provide a second signal at the scan output responsive to the first signal at the first response input. 
 
 
 
     
     
       17. A device comprising:
 a first die including:
 a first surface; 
 a second surface opposite to the first surface; 
 a first contact on the first surface and a second contact on the second surface; 
 a first through silicon via having a first end and a second end, the first end coupled to the first contact and the second end coupled to the second contact; and 
 a first scan cell having a first control input, a first response input, and a first stimulus output, the first response input coupled to the first end and the first stimulus output coupled to the second end; and 
 
 a second die including:
 a third surface; 
 a fourth surface opposite to the fourth surface; 
 a third contact on the third surface and a fourth contact on the fourth surface, the third contact coupled to the second contact; 
 a second through silicon via having a third end and a fourth end, the third end coupled to the third contact and the fourth end coupled to the fourth contact; and 
 a second scan cell having a second control input, a second response input, and a second stimulus output, the second response input coupled to the third end and the second stimulus output coupled to the fourth end. 
 
 
     
     
       18. The device of  claim 17 , wherein the first die includes a switch including a first terminal coupled to the first contact, a second terminal coupled to the first response input, and a third terminal coupled to the first end. 
     
     
       19. The device of  claim 17 , wherein the first die includes a switch including a switch control input, a first terminal coupled to the second contact, a second terminal coupled to the first stimulus output, and a third terminal coupled to the second end. 
     
     
       20. The device of  claim 17 , wherein the first die includes a resistor and a switch coupled between the first response input and the resistor.