Solid-state imaging device and electronic apparatus
Abstract
A solid-state imaging device and method of making a solid-state imaging device are described herein. By way of example, the solid-state imaging device includes a first wiring layer formed on a sensor substrate and a second wiring layer formed on a circuit substrate. The sensor substrate is coupled to the circuit substrate, the first wiring layer and the second wiring layer being positioned between the sensor substrate and the circuit substrate. A first electrode is formed on a surface of the first wiring layer, and a second electrode is formed on a surface of the second wiring layer. The first electrode is in electrical contact with the second electrode.
Claims
exact text as granted — not AI-modifiedThe invention claimed is:
1. An imaging device comprising:
a first transfer transistor that, in a planar view of the imaging device, is between a first floating diffusion and a first photodiode;
a second transfer transistor that, in the planar view of the imaging device, is between a second floating diffusion and a second photodiode;
a third transfer transistor that, in the planar view of the imaging device, is between a third floating diffusion and a third photodiode;
a fourth transfer transistor that, in the planar view of the imaging device, is between a fourth floating diffusion and a fourth photodiode; and
a first electrode that, in the planar view of the imaging device, overlaps the first floating diffusion, the second floating diffusion, the third floating diffusion and the fourth floating diffusion,
wherein the first electrode is wired to the first floating diffusion, the second floating diffusion, the third floating diffusion and the fourth floating diffusion.
2. The imaging device according to claim 1 , further comprising:
a first transfer gate electrode formed on a surface of the first wiring layer, the first transfer gate electrode being provided in a first corner of the first photodiode.
3. The imaging device according to claim 2 , further comprising:
a second transfer gate electrode formed on a surface of the first wiring layer, the first transfer gate electrode being provided in a first corner of the second photodiode.
4. The imaging device according to claim 2 , further comprising:
a first well formed in a second corner of the first photodiode, the second corner of the first photodiode being the diagonal corner to the first corner of the first photodiode.
5. The imaging device according to claim 4 , further comprising:
a first ground terminal formed in the first well.
6. The imaging device according to claim 4 , further comprising:
a second well formed in a second corner of the second photodiode, the second corner of the second photodiode being the diagonal corner to the first corner of the second photodiode.
7. The imaging device according to claim 6 , further comprising:
a second ground terminal formed in the second well.
8. The imaging device according to claim 6 , wherein a ground wiring is electrically connected to the first well and the second well.
9. The imaging device according to claim 1 , further comprising:
a first wiring layer formed on a sensor substrate, the first wiring layer comprises the first electrode.
10. The imaging device according to claim 9 , further comprising:
a second wiring layer formed on a circuit substrate, the second wiring layer comprises a second electrode.
11. The imaging device according to claim 10 , wherein a width of a region in which the first electrode and the second electrode are formed is smaller in a direction parallel to a surface of the first wiring layer than a width of a region in which the first photodiode and the second photodiode are formed.
12. The imaging device according to claim 10 , further comprising:
an amplification transistor formed in the circuit substrate, the first floating diffusion and the second floating diffusion are wired to a gate electrode of the amplification transistor.
13. The imaging device according to claim 12 , wherein the circuit substrate comprises a reset transistor and a select transistor, the first photodiode and the second photodiode shares the amplification transistor, the select transistor and the reset transistor.
14. The imaging device according to claim 12 , wherein the second electrode is wired to a gate electrode of the amplification transistor.
15. The imaging device according to claim 10 , further comprising:
an element isolation unit that, in the planar view of the imaging device, is between the first photodiode and the second photodiode formed in the sensor substrate.
16. The imaging device according to claim 15 , wherein in the planar view of the imaging device, the element isolation unit is between the third photodiode and the fourth photodiode formed in the sensor substrate.
17. The imaging device according to claim 15 , wherein in the planar view of the imaging device, the element isolation unit is between the first photodiode and the third photodiode formed in the sensor substrate.
18. The imaging device according to claim 15 , wherein in the planar view of the imaging device, the element isolation unit is between the second photodiode and the fourth photodiode formed in the sensor substrate.Join the waitlist — get patent alerts
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