US12002626B2ActiveUtilityA1

Multi-layer ceramic electronic component, multi-layer ceramic electronic component mounting substrate, multi-layer ceramic electronic component package, and method of producing a multi-layer ceramic electronic component

Assignee: TAIYO YUDEN KKPriority: Aug 23, 2018Filed: Oct 22, 2021Granted: Jun 4, 2024
Est. expiryAug 23, 2038(~12.1 yrs left)· nominal 20-yr term from priority
Inventors:Hiroaki Sato
H01G 2/06H05K 1/02H05K 1/182H01G 4/30H01G 4/012H01G 4/12H01G 4/248H05K 1/181H05K 2201/10015H01G 4/302H01G 4/232H05K 3/3442Y02P70/50H01G 4/1209
75
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Cited by
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References
7
Claims

Abstract

A multi-layer ceramic electronic component includes: a ceramic body including internal electrodes laminated in a first direction, a first main surface including a first flat region facing in the first direction, and a second main surface including a second flat region facing in the first direction; and a pair of external electrodes connected to the internal electrodes and facing each other in a second direction orthogonal to the first direction, a dimension of the ceramic body in the first direction being 1.1 times or more and 1.6 times or less a dimension of the ceramic body in a third direction orthogonal to the first and second directions, the first flat region being formed at a center portion of the first main surface in the second direction, the second flat region being formed at a center portion of the second main surface in the third direction.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A method of producing a multi-layer ceramic electronic component, comprising:
 forming an internal electrode pattern having a predetermined thickness on each unsintered ceramic sheet of a plurality of unsintered ceramic sheets, each unsintered ceramic sheet comprising an electrode non-formation region where the internal electrode pattern is absent; 
 forming a dielectric pattern on each unsintered ceramic sheet of the plurality of unsintered ceramic sheets having the internal electrode pattern fowled thereon, the dielectric pattern being formed only in the respective electrode non-formation region of each unsintered ceramic sheet such that the dielectric pattern occupies 75% or more and less than 100% of the electrode non-formation region; 
 laminating in a first direction the plurality of unsintered ceramic sheets, the internal electrode pattern and the dielectric pattern being formed on each unsintered ceramic sheet of the plurality of unsintered ceramic sheets, and thereby forming an unsintered multi-layer body; 
 cutting the unsintered multi-layer body, thereby forming an unsintered ceramic body including a plurality of internal electrodes laminated in the first direction; 
 sintering the unsintered ceramic body to form a sintered ceramic body; and 
 forming a pair of external electrodes that are connected to the plurality of internal electrodes and face each other in a second direction orthogonal to the first direction, 
 a dimension of the sintered ceramic body in the first direction being 1.1 times or more and 1.6 times or less a dimension of the sintered ceramic body in a third direction orthogonal to the first direction and the second direction, 
 wherein the internal electrode pattern on each unsintered ceramic sheet of the plurality of unsintered ceramic sheets comprises a first column of internal electrodes and a second column of internal electrodes that are displaced, in the second direction, by one chip compared to the internal electrodes in the first column. 
 
     
     
       2. The method of producing a multi-layer ceramic electronic component according to  claim 1 , wherein the unsintered ceramic body further includes a first main surface including a first flat region facing in the first direction, and a second main surface including a second flat region, the second flat region being on a side opposite to the first flat region and facing in the first direction,
 wherein the first flat region is formed at a center portion of the first main surface in the second direction, and 
 wherein the second flat region is formed at a center portion of the second main surface in the third direction. 
 
     
     
       3. The method of producing a multi-layer ceramic electronic component according to  claim 2 , wherein a dimension of the first flat region in the third direction is 80% or more and less than 100% of the dimension of the unsintered ceramic body in the third direction. 
     
     
       4. The method of producing a multi-layer ceramic electronic component according to  claim 2 , wherein a dimension of the second flat region in the second direction is 80% or more and less than 100% of a dimension of the unsintered ceramic body in the second direction. 
     
     
       5. The method of producing a multi-layer ceramic electronic component according to  claim 2 , wherein
 when a first imaginary line and a second imaginary line are defined on a cross section of the sintered ceramic body in the first direction and the third direction, the first imaginary line passing through a center point of the first main surface in the third direction and orthogonally intersecting with the first direction, the second imaginary line being parallel to the first imaginary line and having an interval from the first imaginary line, the interval being 1% of the dimension of the sintered ceramic body in the first direction, the first flat region includes a region between two points at which the second imaginary line and the first main surface intersect with each other, and 
 when a third imaginary line and a fourth imaginary line are defined on a cross section of the sintered ceramic body in the first direction and the second direction, the third imaginary line passing through a center point of the second main surface in the second direction and orthogonally intersecting with the first direction, the fourth imaginary line being parallel to the third imaginary line and having an interval from the third imaginary line, the interval being 1% of the dimension of the sintered ceramic body in the first direction, the second flat region includes a region between two points at which the fourth imaginary line and the second main surface intersect with each other. 
 
     
     
       6. The method of producing a multi-layer ceramic electronic component according to  claim 1 , wherein the dimension of the sintered ceramic body in the second direction is larger than 1.0 times and equal to or smaller than 1.5 times the dimension of the sintered ceramic body in the first direction. 
     
     
       7. The method of producing a multi-layer ceramic electronic component according to  claim 1 , wherein the plurality of unsintered ceramic sheets includes first unsintered ceramic sheets each having first internal electrode patterns, and second unsintered ceramic sheets each having second internal electrode patterns,
 wherein the first unsintered ceramic sheets and the sheets unsintered ceramic sheets are alternately laminated, and 
 wherein the second internal electrode patterns are displaced from the first internal electrode patterns by one chip in the second direction or the third direction.

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