US11942925B2ActiveUtilityA1
Management of multiple switching-synchronized measurements using combined prioritized measurement and round-robin sequence measurement
Est. expiryDec 16, 2040(~14.4 yrs left)· nominal 20-yr term from priority
H03K 17/08122H02M 1/0845H02M 7/537H03K 17/163H03K 17/687H03K 17/689H03K 17/691H03K 2217/0027H03K 17/18H02M 1/0006H02M 1/08H02M 3/33523H02M 1/0029H02M 1/32H02M 7/53873
73
PatentIndex Score
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Cited by
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References
20
Claims
Abstract
A method for operating a gate driver system includes measuring a first parameter according to a first priority schedule synchronously to a first edge of a switching signal generated by a gate driver integrated circuit and having a variable duty cycle. The method includes after measuring the first parameter of the gate driver system and prior to a second edge of the switching signal, measuring at least a second parameter of the gate driver system according to a first round-robin schedule synchronously to the first edge of the switching signal.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1. A method for managing measurements in a gate driver system, the method comprising:
with a gate driver integrated circuit, generating a switching signal that transitions according to a variable duty cycle between a first state and a second state;
in response to the switching signal transitioning from the second state to the first state, taking one or more higher priority measurements of the gate driver system according to a first priority schedule; and
after taking the one or more higher priority measurements according to the first priority schedule, and prior to a next transition of the switching signal from the first state to the second state, taking one or more lower priority measurements of the gate driver system according to a second priority schedule.
2. The method of claim 1 wherein the first priority schedule includes a single measurement slot, and the second priority schedule includes a sequenced plurality of measurements slots.
3. The method as recited in claim 1 further comprising, in response to a next transition of the switching signal from the first state to the second state, taking one or more measurements of the gate driver system according to a third priority schedule.
4. The method of claim 3 wherein the one or more measurements of the gate driver system taken according to the third priority schedule include one or more higher priority measurements, and the method further comprises, after taking the one or more higher priority measurements according to the third priority schedule, and prior to a next transition of the switching signal from the second state to the first state, taking one or more lower priority measurements of the gate driver system according to a fourth priority schedule.
5. The method of claim 1 further comprising:
in response to a next transition of the switching signal from the second state to the first state, retaking one or more higher priority measurements according to the first priority schedule; and
after retaking the one or more higher priority measurements, and prior to a next transition of the switching signal from the first state to the second state, resuming the second priority schedule to take one or more lower priority measurements of the gate driver system and complete execution of the second priority schedule, which was partially completed when the switching signal was previously in the first state.
6. The method of claim 1 wherein the first state is an on-state of a high-power drive device coupled to the gate driver integrated circuit and the second state is an off-state of the high-power drive device.
7. The method of claim 1 further comprising:
after completing the second priority schedule, and prior to a next transition of the switching signal transitioning from the first state to the second state, retaking the one or more lower priority measurements according to a second iteration of the second priority schedule; and
overwriting a stored measurement of one or more lower priority measurements with a measurement taken during the retaking of the one or more lower priority measurements.
8. The method of claim 1 wherein the one or more higher priority measurements are of a current or a voltage associated with a high-power drive device measured using a terminal of the gate driver integrated circuit.
9. The method of claim 1 wherein the switching signal is pulse-width modulated.
10. A gate driver system comprising:
a driver circuit of an integrated circuit; and
a controller circuit of the integrated circuit configured, in response to a switching signal having a variable duty cycle transitioning from a second state to a first state, to cause the integrated circuit to take one or more higher priority measurements of the gate driver system according to a first priority schedule, and further configured, after the one or more higher priority measurements according to the first priority schedule are taken, and prior to a next transition of the switching signal from the first state to the second state, to cause the integrated circuit to take one or more lower priority measurements of the gate driver system according to a second priority schedule.
11. The gate driver system of claim 10 further comprising:
a gate driver product having a high-voltage side and a low-voltage side, the high-voltage side including the integrated circuit;
an isolation barrier between the high-voltage side and the low-voltage side;
an isolation communications channel configured to communicate information between the high-voltage side and the low-voltage side; and
an analog-to-digital converter disposed on the high-voltage side of the gate driver product.
12. The gate driver system of claim 10 wherein the first priority schedule includes a single measurement slot, and the second priority schedule includes a sequenced plurality of measurements slots.
13. The gate driver system of claim 10 wherein the controller circuit is further configured, in response to a next transition of the switching signal from the first state to the second state, to cause the integrated circuit to take one or more measurements of the gate driver system according to a third priority schedule.
14. The gate driver system of claim 13 wherein the one or more measurements of the gate driver system taken according to the third priority schedule include one or more higher priority measurements, and the controller circuit is further configured, after the one or more higher priority measurements according to the third priority schedule are taken, and prior to a next transition of the switching signal from the second state to the first state, to cause the integrated circuit to take one or more lower priority measurements of the gate driver system according to a fourth priority schedule.
15. The gate driver system of claim 10 wherein the controller circuit is further configured:
in response to a next transition of the switching signal from the second state to the first state, to cause the integrated circuit to retake the one or more higher priority measurements according to the first priority schedule; and
after the one or more higher priority measurements are retaken, and prior to a next transition of the switching signal from the first state to the second state, to cause the integrated circuit to resume the second priority schedule by taking one or more lower priority measurements of the gate driver system that were not taken during execution of the second priority schedule when the switching signal was last in the first state.
16. The gate driver system of claim 10 wherein the first state is an on-state of a high-power drive device coupled to the gate driver system and the second state is an off-state of the high-power drive device.
17. The gate driver system of claim 10 wherein the controller circuit is further configured:
after completion of the second priority schedule, and prior to a next transition of the switching signal from the first state to the second state, to cause the integrated circuit to retake the one or more lower priority measurements according to a second iteration of the second priority schedule; and
to cause the integrated circuit to overwrite a stored measurement of one or more lower priority measurements with a measurement taken during the retaking of the one or more lower priority measurements.
18. A gate driver system comprising:
a driver circuit of an integrated circuit; and
a controller circuit of the integrated circuit configured to cause the integrated circuit to measure one or both of a current through a high-power drive device and a voltage across the high-power drive device according to a first priority schedule responsive to a first edge of a switching signal having a variable duty cycle, and further configured, after the measurement of the one or both of the current and the voltage and prior to a next edge of the switching signal, to cause the integrated circuit to measure additional parameters according to a first round-robin schedule responsive to the first edge of the switching signal.
19. The gate driver system of claim 18 wherein the controller circuit is further configured to adjust a control signal driving the high-power drive device based on digital representations of one or both of the current and the voltage.
20. The gate driver system of claim 18 wherein the controller circuit is further configured to cause the integrated circuit to measure one or both of the current through the high-power drive device and the voltage across the high-power drive device according to a second priority schedule synchronously to a second edge of the switching signal, the first priority schedule and the first round-robin schedule corresponding to an on-state of the high-power drive device and the second priority schedule and a second round-robin schedule corresponding to an off-state of the high-power drive device, and the controller circuit is further configured to, after measurement of the current and the voltage and prior to a next second edge of the switching signal, to cause the integrated circuit to measure second additional parameters according to the second round-robin schedule responsive to a next second edge of the switching signal.Join the waitlist — get patent alerts
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