Memory controller and operating method thereof

Abstract

The present disclosure provides a memory controller including a state detector detecting whether the memory device is in an idle state, a program controller, based on detection information that indicates a state of the memory device, selecting neighboring strings that are adjacent to a string that is coupled to a memory cell, among the memory cells, on which a program operation or a read operation was performed before the detecting, selecting monitoring memory cells that are coupled to at least one word line, the memory cells being a part of the neighboring strings, and controlling the memory device to perform a plurality of loops to program the monitoring memory cells, and a bad block selector selecting a memory block with the monitoring memory cells as a bad block based on a rate of increase in threshold voltage of a threshold voltage distribution of the monitoring memory cells.

What is claimed is: 
     
       1. A memory controller controlling a memory device with memory cells that are included in a plurality of strings, respectively, the memory controller comprising:
 a state detector detecting whether the memory device is in an idle state; 
 a program controller selecting neighboring strings that are adjacent to a string that comprises a memory cell, among the memory cells, on which a program operation or a read operation was performed, based on detection information that indicates a state of the memory device, selecting monitoring memory cells that are coupled to at least one word line, the monitoring memory cells being a part of the neighboring strings, and controlling the memory device to perform a plurality of loops to program the monitoring memory cells; and 
 a bad block selector selecting a memory block with the monitoring memory cells as a bad block based on a rate of increase in threshold voltage of a threshold voltage distribution of the monitoring memory cells. 
 
     
     
       2. The memory controller of  claim 1 , wherein the program controller controls the memory device to perform the plurality of loops on the monitoring memory cells when the detection information indicates the idle state. 
     
     
       3. The memory controller of  claim 1 , wherein the program controller selects memory cells that are coupled to at least one word line, among a word line that is adjacent to a source select line, a word line that is adjacent to a drain select line, and a center word line as the monitoring memory cells,
 wherein the memory cells are a part of the neighboring strings. 
 
     
     
       4. The memory controller of  claim 1 , wherein the program controller outputs a program command that provides instructions to program the monitoring memory cells into a highest program state. 
     
     
       5. The memory controller of  claim 1 , wherein at least one of the plurality of loops includes at least one program loop, and
 wherein the at least one program loop includes a program operation that applies a program voltage to the at least one word line and a verify operation that applies a verify voltage. 
 
     
     
       6. The memory controller of  claim 5 , wherein a program loop that is performed first in each of the plurality of loops is the same. 
     
     
       7. The memory controller of  claim 5 , wherein the program controller outputs a suspend command that suspends the plurality of loops to the memory device whenever a number of times the at least one program loop that is included in each of the plurality of loops is performed on the memory device is increased. 
     
     
       8. The memory controller of  claim 7 , wherein the bad block selector determines a number of memory cells that are turned off, among the monitoring memory cells, based on verify data that is read during the verify operation that is performed last before the suspend command is output. 
     
     
       9. The memory controller of  claim 8 , wherein the bad block selector determines the rate of increase in threshold voltage of the threshold voltage distribution based on the number of memory cells that are turned off. 
     
     
       10. The memory controller of  claim 9 , wherein the bad block selector selects the memory block with the monitoring memory cells as the bad block when the rate of increase in threshold voltage of the threshold voltage distribution is greater than a reference value. 
     
     
       11. The memory controller of  claim 7 , wherein the program controller outputs a read command for reading the monitoring memory cells after outputting the suspend command. 
     
     
       12. The memory controller of  claim 11 , wherein the bad block selector determines a number of memory cells that are turned off, among the monitoring memory cells, based on data that is read during a read operation that corresponds to the read command. 
     
     
       13. The memory controller of  claim 12 , wherein the bad block selector determines the rate of increase in threshold voltage of the threshold voltage distribution based on the number of memory cells that are turned off. 
     
     
       14. The memory controller of  claim 13 , wherein the bad block selector selects the memory block with the monitoring memory cells as the bad block when the rate of increase in threshold voltage of the threshold voltage distribution is greater than a reference value. 
     
     
       15. A method of operating a memory controller controlling a memory device with memory cells that are included in a plurality of strings, respectively, the method comprising:
 detecting a state of the memory device; 
 selecting neighboring strings that are adjacent to a string that comprises a memory cell, among the memory cells, on which a program operation or a read operation was performed, based on an idle state of the memory device; 
 selecting memory cells that are included in at least one word line as monitoring memory cells, wherein the memory cells are a part of the neighboring strings; 
 outputting a program command to perform a plurality of loops to program the monitoring memory cells; and 
 selecting a memory block with the monitoring memory cells as a bad block based on a rate of increase in threshold voltage of a threshold voltage distribution of the monitoring memory cells. 
 
     
     
       16. The method of  claim 15 , wherein each of the plurality of loops includes at least one program loop, and
 wherein the at least one program loop includes a program operation that applies a program voltage to the at least one word line and a verify operation that applies a verify voltage. 
 
     
     
       17. The method of  claim 16 , further comprising outputting a suspend command that suspends the plurality of loops to the memory device whenever a number of times the at least one program loop that is included in each of the plurality of loops is performed on the memory device is increased after outputting the program command. 
     
     
       18. The method of  claim 17 , wherein the selecting as the bad block comprises:
 determining a number of memory cells that are turned off, among the monitoring memory cells, based on verify data that is read during the verify operation that is performed last before outputting the suspend command; 
 determining a rate of increase in threshold voltage of the threshold voltage distribution based on the number of memory cells that are turned off; and 
 selecting the memory block with the monitoring memory cells as the bad block when the rate of increase in threshold voltage of the threshold voltage distribution is greater than a reference value. 
 
     
     
       19. A storage device, comprising:
 a memory device including memory cells that are included in each of a plurality of strings; and 
 a memory controller detecting whether the memory device is in an idle state or not, selecting memory cells that are adjacent to a memory cell on which a program operation or a read operation was performed, among the memory cells, as monitoring memory cells, controlling the memory device to perform a plurality of loops that program the monitoring memory cells, and selecting a memory block with the monitoring memory cells as a bad block based on a rate of increase in threshold voltage of a threshold voltage distribution of the monitoring memory cells. 
 
     
     
       20. The storage device of  claim 19 , wherein the memory controller determines a number of memory cells that are turned off, among the monitoring memory cells, based on verify data that is read during a last verify operation in each of the plurality of loops, and
 wherein the memory controller selects the memory block with the monitoring memory cells as the bad block based on the rate of increase in threshold voltage of the threshold voltage distribution determined based on the number of memory cells that are turned off.