US11881848B2ActiveUtilityA1
Method for checking a semiconductor switch for a fault
Est. expiryMar 18, 2039(~12.6 yrs left)· nominal 20-yr term from priority
Inventors:Philipp Eck
H03K 17/18G01R 31/2617G01R 31/2621G01R 31/275H03K 17/082H03K 2217/0072
35
PatentIndex Score
0
Cited by
24
References
6
Claims
Abstract
The invention provides a method for checking a semiconductor switch for a fault, wherein the semiconductor switch is driven with a PWM signal with a variable duty cycle. To the benefit of determining faults on the semiconductor switch reliably and cost-effectively, it is provided that if the semiconductor switch is operated with a duty cycle of 100% or 0%, the current measurement of the overall system is evaluated, while if the semiconductor switch is operated with a duty cycle of between 0% and 100%, the generated voltage pulses across the semiconductor switch are evaluated.
Claims
exact text as granted — not AI-modifiedThe invention claimed is:
1. A method for checking a semiconductor switch for a fault, the method comprising:
driving the semiconductor switch with a PWM signal with variable duty cycle,
wherein when the semiconductor switch is operating with a duty cycle of 100% or 0%, evaluating the current measurement of an overall system into which the semiconductor switch is integrated,
wherein while when the semiconductor switch is operating with a duty cycle between 0% and 100%, evaluating the voltage pulses generated across the semiconductor switch;
wherein the voltage pulses generated across the semiconductor switch are counted for the evaluation, and as a result of the evaluation a short circuit or an open circuit of the semiconductor switch is detected if the latter does not generate voltage pulses.
2. The method as claimed in claim 1 , wherein at a duty cycle of 100% or 0% the evaluation is aborted and a fault is determined via the current measurement of the overall system.
3. A device for carrying out a method for checking a semiconductor switch for a fault, the method comprising:
driving the semiconductor switch with a PWM signal with variable duty cycle,
wherein when the semiconductor switch is operating with a duty cycle of 100% or 0%, evaluating the current measurement of an overall system into which the semiconductor switch is integrated,
wherein while when the semiconductor switch is operating with a duty cycle between 0% and 100%, evaluating the voltage pulses generated across the semiconductor switch; and
wherein the voltage pulses generated across the semiconductor switch (S 3 ) are tapped off it via a capacitor (C 4 ) and applied to an A/D converter (Q 1 , Q 2 ), which applies a digital signal (Timer) to the counter input of a controller for the evaluation.
4. The device as claimed in claim 3 , wherein the voltage pulses tapped off by the capacitor are converted by a diode (D 4 ) into positive pulses that are applied to the A/D converter (Q 1 , Q 2 ).
5. The device as claimed in claim 3 , wherein the voltage pulses generated across the semiconductor switch are counted for the evaluation, and as a result of the evaluation a short circuit or an open circuit of the semiconductor switch is detected if the latter does not generate voltage pulses.
6. The device as claimed in claim 3 , wherein the voltage pulses generated across the semiconductor switch are counted for the evaluation, and as a result of the evaluation a short circuit or an open circuit of the semiconductor switch is detected if the latter does not generate voltage pulses, and
wherein at a duty cycle of 100% or 0% the evaluation is aborted and a fault is determined via the current measurement of the overall system.Join the waitlist — get patent alerts
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