US11869935B2ActiveUtilityA1

Semiconductor device and method of fabricating the same

Assignee: WUHAN XINXIN SEMICONDUCTOR MFGPriority: Apr 30, 2021Filed: Dec 17, 2021Granted: Jan 9, 2024
Est. expiryApr 30, 2041(~14.8 yrs left)· nominal 20-yr term from priority
Inventors:Le Li
H10D 84/83H10D 62/102H10D 30/0323H10D 30/021H10D 62/124H10D 62/113H10D 62/10H10D 62/115H10D 30/6744H10D 64/512H01L 29/0649H01L 27/088H01L 29/0607
58
PatentIndex Score
0
Cited by
16
References
18
Claims

Abstract

A semiconductor device and a method of fabricating same are disclosed. The semiconductor device includes: an SOI substrate including, stacked from the bottom upward, a lower substrate, a buried insulator layer and a semiconductor layer, wherein active regions surrounded by trench isolation structures are formed in the semiconductor layer; a gate electrode layer formed over the semiconductor layer, the gate electrode layer extending from active regions to trench isolation structures; and a source region and a drain region formed in the active regions that are on opposing sides of the gate electrode layer, wherein at least one end portion of the gate electrode layer laterally spans over interfaces of the active regions and the trench isolation structures toward the source region and/or the drain region. Thereby leakage at the interfaces of the active regions and the trench isolation structures can be reduced, resulting in improved performance of the semiconductor device.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A semiconductor device, comprising:
 a semiconductor-on-insulator substrate comprising, stacked from the bottom upward, a lower substrate, a buried insulator layer and a semiconductor layer, wherein active regions surrounded by trench isolation structures are formed in the semiconductor layer; 
 a gate electrode layer formed over the semiconductor layer, the gate electrode layer extending from the active regions to the trench isolation structures; 
 a source region and a drain region respectively formed in the active regions that are on opposing sides of the gate electrode layer, wherein at least one end portion of the gate electrode layer laterally spans over interfaces of the active regions and the trench isolation structures toward the source region and/or the drain region; and 
 a body contact region, which is formed in the source region and brought into contact with the gate electrode layer. 
 
     
     
       2. The semiconductor device of  claim 1 , further comprising an ion-doped gate region, which is formed in the gate electrode layer and extends from a side of the gate electrode layer closer to the body contact region toward the drain region, and wherein the body contact region comes into contact with the ion-doped gate region in a direction from the source region toward the drain region. 
     
     
       3. The semiconductor device of  claim 2 , wherein the gate electrode layer comprises a base gate section and an extended gate section, wherein the source region and the drain region are respectively formed in the active regions that are on opposing sides of the base gate section, wherein at least one end portion of the base gate section laterally spans over interfaces of the active regions and the trench isolation structures toward the source region and/or the drain region, and wherein the extended gate section extends at least from the base gate section toward the source region. 
     
     
       4. The semiconductor device of  claim 3 , wherein the extended gate section extending at least from the base gate section toward the source region includes:
 extension of the extended gate section from the base gate section toward the source region; or extension of the extended gate section from the base gate section toward both the source region and the drain region. 
 
     
     
       5. The semiconductor device of  claim 4 , wherein in the case of the extended gate section extending from the base gate section toward the source region, the ion-doped gate region is entirely located in the extended gate section, or further extends from the extended gate section into the base gate section. 
     
     
       6. The semiconductor device of  claim 4 , wherein in the case of the extended gate section extending from the base gate section toward both the source region and the drain region, the ion-doped gate region is entirely located in a portion of the extended gate section located closer to the source region, or further extends from the extended gate section into the base gate section, or even into a portion of the extended gate section located closer to the drain region. 
     
     
       7. The semiconductor device of  claim 2 , wherein the source region and the drain region are of a same conductivity type, wherein the body contact region and the ion-doped gate region are of a same conductivity type, and wherein the body contact region and the source region are of different conductivity types. 
     
     
       8. The semiconductor device of  claim 1 , wherein a gate dielectric layer is present between the gate electrode layer and the semiconductor layer. 
     
     
       9. A semiconductor device, comprising:
 a semiconductor-on-insulator substrate comprising, stacked from the bottom upward, a lower substrate, a buried insulator layer and a semiconductor layer, wherein active regions surrounded by trench isolation structures are formed in the semiconductor layer; 
 a gate electrode layer formed over the semiconductor layer, the gate electrode layer extending from the active regions to the trench isolation structures, wherein the gate electrode layer comprises a base gate section and an extended gate section; 
 a source region and a drain region respectively formed in the active regions that are on opposing sides of the base gate section, wherein at least one end portion of the gate electrode layer laterally spans over interfaces of the active regions and the trench isolation structures toward the source region and/or the drain region; and 
 a body contact region straddling over the extended gate section and remote from the base gate section, 
 wherein the body contact region is formed in the source region and brought into contact with the gate electrode layer. 
 
     
     
       10. The semiconductor device of  claim 9 , wherein the extended gate section extends from the base gate section toward the source region. 
     
     
       11. The semiconductor device of  claim 9 , further comprising an ion-doped gate region, which is entirely located in the extended gate section, and wherein the body contact region comes into contact with the ion-doped gate region. 
     
     
       12. The semiconductor device of  claim 9 , wherein the body contact region straddles over an end of the extended gate section. 
     
     
       13. A method of fabricating a semiconductor device, the method comprising:
 providing a semiconductor-on-insulator substrate comprising, stacked from the bottom upward, a lower substrate, a buried insulator layer and a semiconductor layer, wherein active regions surrounded by trench isolation structures are formed in the semiconductor layer; 
 forming a gate electrode layer over the semiconductor layer, the gate electrode layer extending from the active regions to the trench isolation structures; 
 forming a source region and a drain region in the active regions that are on opposing sides of the gate electrode layer, wherein at least one end portion of the gate electrode layer laterally spans over interfaces of the active regions and the trench isolation structures toward the source region and/or the drain region; and 
 forming a body contact region in the source region, wherein the body contact region is in contact with the gate electrode layer. 
 
     
     
       14. The method of  claim 13 , further comprising forming an ion-doped gate region in the gate electrode layer, the ion-doped gate region extending from a side of the gate electrode layer closer to the body contact region toward the drain region, the body contact region coming into contact with the ion-doped gate region in a direction from the source region toward the drain region. 
     
     
       15. The method of  claim 14 , wherein the gate electrode layer comprises a base gate section and an extended gate section, wherein the source region and the drain region are respectively formed in the active regions that are on opposing sides of the base gate section, wherein at least one end portion of the base gate section laterally spans over interfaces of the active regions and the trench isolation structures toward the source region and/or the drain region, and wherein the extended gate section extends at least from the base gate section toward the source region. 
     
     
       16. The method of  claim 15 , wherein the extended gate section extending at least from the base gate section toward the source region includes: extension of the extended gate section from the base gate section toward the source region; or extension of the extended gate section from the base gate section toward both the source region and the drain region. 
     
     
       17. The method of  claim 16 , wherein in the case of the extended gate section extending from the base gate section toward the source region, the ion-doped gate region is entirely located in the extended gate section, or further extends from the extended gate section into the base gate section. 
     
     
       18. The method of  claim 16 , wherein in the case of the extended gate section extending from the base gate section toward both the source region and the drain region, the ion-doped gate region is entirely located in a portion of the extended gate section located closer to the source region, or further extends from the extended gate section into the base gate section, or even into a portion of the extended gate section located closer to the drain region.

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