Method, system, and server for monitoring status of solid state drive

Abstract

A method, a system, and a server for monitoring status of SSD applied in the server allows a volume management device which has been disabled because of conflict to be used to maintain unchanged information of power indicating control bit when an SSD is unplugged. The unchanged information of power indicating control bit is transmitted to a CPLD and decoder information is obtained from the CPLD. Position of the SSD in the register is set according to the decoder information.

What is claimed is: 
     
       1. A method for monitoring status of solid state drive (SSD) applied in a processor with disabled volume management device, the method comprising:
 when the SSD is unplugged, maintaining unchanged information of power indicating control bit through a peripheral component interconnect express (PCIe) software; 
 transmitting the information of power indicating control bit to a Complex Programmable Logic Device (CPLD); 
 obtaining decoder information from the CPLD; and 
 setting position in register according to the decoder information, setting the volume management device as disable, and switching off a positioning LED through the PCIe software. 
 
     
     
       2. The method according to  claim 1 , wherein the information of power indicating control bit is set as 01 b. 
     
     
       3. The method according to  claim 1 , wherein the information of power indicating control bit is set as 1 b. 
     
     
       4. The method according to  claim 1 , wherein the register position information is set as 1. 
     
     
       5. The method according to  claim 1 , wherein the transmitting the information of power indicating control bit to the CPLD comprises:
 the processor transmitting the information of power indicating control bit to the CPLD through Inter-Integrated Circuit (I2C). 
 
     
     
       6. A system for monitoring status of SSD applied in a processor with disabled volume management device, the system comprising:
 a maintaining module configured to, when the SSD is unplugged, maintain unchanged information of power indicating control bit through a peripheral component interconnect express (PCIe) software; 
 a transmitting module configured to transmitting the information of power indicating control bit to a CPLD; 
 an information obtaining module configured to obtain decoder information from the CPLD; and 
 a setting module configured to set position in register according to the decoder information, set the volume management device as disable, and switch off a positioning LED through the PCIe software. 
 
     
     
       7. The system according to  claim 6 , wherein the information of power indicating control bit is set as 01 b. 
     
     
       8. The system according to  claim 6 , wherein the information of power indicating control bit is set as 1 b. 
     
     
       9. The system according to  claim 6 , wherein the register position information is set as 1. 
     
     
       10. The system according to  claim 6 , wherein the transmitting module transmits the information of power indicating control bit to the CPLD comprises:
 the processor transmits the information of power indicating control bit to the CPLD through I2C. 
 
     
     
       11. A server for monitoring status of SSD applied in a processor with disabled volume management device, the server comprising:
 at least one processor; and 
 at least one memory coupled to the at least one processor and storing program instructions; the at least one memory and the program instructions configured to, with the at least one processor, cause the apparatus to perform: 
 when the SSD is unplugged, maintaining unchanged information of power indicating control bit through a peripheral component interconnect express (PCIe) software; 
 transmitting the information of power indicating control bit to a CPLD; 
 obtaining decoder information from the CPLD; and 
 setting position in register according to the decoder information, setting the volume management device as disable, and switching off a positioning LED through the PCIe software. 
 
     
     
       12. The server according to  claim 11 , wherein the information of power indicating control bit is set as 01 b or 1 b. 
     
     
       13. The server according to  claim 11 , wherein the register position information is set as 1. 
     
     
       14. The server according to  claim 11 , wherein the transmitting the information of power indicating control bit to the CPLD comprises:
 the processor transmits the information of power indicating control bit to the CPLD through I2C.