Semiconductor device with fin-type field effect transistor
Abstract
A semiconductor device and method of making same. The semiconductor device includes: a first conductivity type transistor and a second conductivity type transistor, wherein each of the first conductivity type transistor and the second conductivity type includes a gate insulating film formed on a base, a metal gate electrode formed on the gate insulating film, and side wall spacers formed at side walls of the metal gate electrode, wherein the gate insulating film is made of a high dielectric constant material, and wherein offset spacers are formed between the side walls of the metal gate electrode and the inner walls of the side wall spacers in any one of the first conductivity type transistor and the second conductivity type transistor, or offset spacers having different thicknesses are formed in the first conductivity type transistor and the second conductivity type transistor.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1. A semiconductor device comprising a fin-type field effect transistor, the field effect transistor comprising:
a semiconductor base;
a semiconductor fin on the semiconductor base;
a gate electrode on the semiconductor base and the semiconductor fin;
in cross section, a gate insulating layer between the semiconductor base and the gate electrode, the gate insulating layer including a bottom layer between the semiconductor layer and the gate electrode and walls connected to and extending from the bottom layer, each of the gate insulating layer walls including an inside surface facing the gate electrode and an outside surface facing away from the gate electrode;
in the cross section, a first insulating film including walls, each first insulating layer wall having an inside surface and an outside surface, each inside surface of the first insulating film walls being adjacent a respective outside surface of one of the gate insulating layer walls; and
in the cross section, a second insulating film including walls, each second insulating film wall having an inside surface adjacent the outside surface of a respective one of the first insulating film walls,
wherein,
in the cross section, a distance along a gate length direction between the inside surface of one of the gate insulating layer walls and the inside surface of one of the second insulating film walls at first position along a gate height direction is greater than a distance between the inside surface of the one of the gate insulating layer walls and the inside surface of the one of the second insulating film walls at a second position along the gate height direction, the first position being between the semiconductor base and the second position, and
a top of the semiconductor fin being between first position and the second position.
2. The semiconductor device of claim 1 , wherein the second insulating film walls extend more in a gate height direction than do the first insulating walls.
3. The semiconductor device of claim 1 , wherein the second insulating film walls are adjacent the gate electrode at the second position.
4. The semiconductor device of claim 1 , wherein the gate electrode comprises a buried metal layer and at least one work function layer between the buried metal layer and the gate insulating film.
5. The semiconductor device of claim 1 , wherein the gate electrode comprises a buried metal layer and two work function layers between the buried metal layer and the gate insulating film.
6. A fin-type field effect transistor comprising:
a semiconductor base;
a semiconductor fin on the semiconductor base;
a gate electrode on the semiconductor base and the semiconductor fin; and
a gate insulating layer between the semiconductor base and the gate electrode,
wherein,
the gate electrode has a top portion and a lower portion between the top portion and the semiconductor base,
in cross section, the top portion is wider and the lower portion in a gate length direction, and
a top portion of the semiconductor fin is between the top portion of the gate electrode and the lower portion of the gate electrode.
7. The fin-type field effect transistor of claim 6 , further comprising a first insulating film surrounding the lower portion of the gate electrode in the gate length direction and a second insulating film surrounding the lower portion and the upper portion of the electrode in the gate length direction, the first insulting film being between the gate electrode and the second insulating film.
8. The fin-type field effect transistor of claim 6 , wherein the gate electrode comprises a buried metal layer and at least one work function layer between the buried metal layer and the gate insulating layer.
9. The fin-type field effect transistor of claim 6 , wherein the gate electrode comprises a buried metal layer and two work function layers between the buried metal layer and the gate insulating layer.Join the waitlist — get patent alerts
Track US11824057B2 — get alerts on status changes and closely related new filings.
We store only your email — no account needed. See our privacy policy.