Avalanche photodetector (variants) and method for manufacturing the same (variants)

Abstract

An APD includes a photoconverter and at least one avalanche amplifier of the photocurrent, the amplifier having two layers—a contact layer and a multiplication layer, wherein the multiplication layer is formed on top of the entire conductive wafer, while the contact layer of at least one avalanche amplifier is formed on top of a certain area of the multiplication layer. Meanwhile, outside the contact layer, the multiplication layer functions as a photoconverter. This makes it possible for photocarriers to get into the avalanche amplifier effectively and unimpeded. In order to mitigate the influence of parasite near-surface charge carriers on the avalanche amplifier, its multiplication region is deepened in relation to the upper surface of the photoconverter region. The proposed APD embodiment with less dark current seeping from peripheral areas of the instrument provides higher threshold sensitivity that allows it be on par with state of the art.

What is claimed is: 
     
       1. A method for manufacturing an avalanche photodetector, the method comprising:
 forming a multiplication layer on an entire surface of a semiconductor wafer; 
 covering an entire surface of the multiplication layer with a dielectric layer; 
 forming, on an upper surface of the multiplication layer and dielectric layer, at least one avalanche amplifier by etching a notch in both the dielectric layer and multiplication layer, wherein side walls of the notch are covered with a dielectric layer; 
 forming a contact layer of the at least one avalanche amplifier by (i) filling the notch with highly doped polycrystalline silicon with an opposite conductivity of the multiplication layer, then (ii) followed by diffusion of a dopant from the polycrystalline silicon area into the multiplication layer, wherein a photoconverter layer is formed outside the notch; 
 forming a first electrode made of a transparent material on surfaces of both the contact layer and dielectric layer; and 
 forming a second electrode on a bottom surface of the semiconductor wafer. 
 
     
     
       2. The method of  claim 1 , wherein the notch is circular in plan view. 
     
     
       3. The method of  claim 1 , wherein the notch is hexagonal in plan view. 
     
     
       4. The method of  claim 1 , wherein the semiconductor wafer is made of a low-resistance material. 
     
     
       5. The method of  claim 1 , wherein both the semiconductor wafer and the multiplication layer are made of the same semiconductor material. 
     
     
       6. The method of  claim 1 , wherein the multiplication layer is formed on the semiconductor wafer surface using an epitaxy method. 
     
     
       7. The method of  claim 1 , wherein the notch that has a depth of 0.5 μm to 2.5 μm. 
     
     
       8. A method for manufacturing an avalanche photodetector, the method comprising the following steps:
 forming a multiplication layer on an entire surface of a semiconductor wafer; 
 etching a closed groove on a surface of the multiplication layer, so that a depth of the closed groove is greater than or equal to a thickness of the multiplication layer thickness, but less than a total thickness of the wafer and multiplication layer combined, wherein a photodetector is formed inside a region bounded by the closed groove; 
 filling the groove with highly doped polycrystalline silicon of a same conductivity type as the multiplication layer; 
 covering the multiplication layer with a dielectric layer; 
 forming, inside the region bounded by the closed groove, at least one avalanche amplifier by etching a notch in both the dielectric layer and the multiplication layer, wherein side walls of the notch are covered with a dielectric; 
 forming a contact layer of the at least one avalanche amplifier by (i) filling the notch with highly doped polycrystalline silicon with an opposite conductivity as the multiplication layer, (ii) followed by diffusion of dopant from the polycrystalline silicon area into the multiplication layer wherein a the photoconverter layer is formed outside an area of the notch that had been etched; 
 forming a high-resistance layer on the contact layer surface; 
 forming a first electrode made of a transparent material on surfaces of both the high-resistance layer and the dielectric layer; and 
 forming a second electrode on a bottom surface of the semiconductor wafer. 
 
     
     
       9. The method of  claim 8 , wherein the semiconductor wafer is made of a low-resistance material. 
     
     
       10. The method of  claim 8 , wherein both the semiconductor wafer and the multiplication layer are made of the same semiconductor material. 
     
     
       11. The method of  claim 8 , wherein the multiplication layer is formed on the semiconductor wafer surface using an epitaxy method. 
     
     
       12. The method of  claim 8 , wherein the notch that has a depth of 0.5 μm to 2.5 μm. 
     
     
       13. The method of  claim 8 , wherein the closed groove has a width of 1.5 μm to 2.0 μm. 
     
     
       14. The method of  claim 8 , wherein the high-resistance layer is formed on the contact layer of the avalanche amplifier before the first electrode is formed. 
     
     
       15. An avalanche photodetector comprising:
 a semiconductor wafer; 
 a multiplication layer covering a top surface of the semiconductor wafer; 
 a dielectric layer above the multiplication layer; 
 at least one avalanche amplifier that includes (i) a contact layer formed by diffusing a dopant from the highly doped polycrystalline silicon with an opposite conductivity of the multiplication layer, that fills a notch formed in the etched-away area of the multiplication layer and the dielectric layer, such that a side surface of the multiplication layer is covered with a dielectric material, and (ii) photoconverter, which is outside the contact layer, 
 a first electrode made of a transparent material on surfaces of the contact layer and dielectric layer; and 
 a second electrode formed on a bottom surface of the semiconductor wafer. 
 
     
     
       16. The avalanche photodetector of  claim 15 , wherein the notch etched in the dielectric layer and the multiplication layer has depth of 0.5 μm to 2.5 μm. 
     
     
       17. The avalanche photodetector of  claim 15 , further comprising a closed groove, whose depth is greater than or equal to the multiplication layer thickness, but less than a total thickness of the semiconductor wafer and the multiplication layer combined, wherein the closed groove is filled with highly doped polycrystalline silicon of the same conductivity type as the multiplication layer, and wherein the at least one avalanche amplifier and the photoconverter are inside the closed groove. 
     
     
       18. The avalanche photodetector of  claim 17 , wherein the closed groove has width of 1.5 μm to 2.0 μm. 
     
     
       19. The avalanche photodetector of  claim 17 , further comprising a high-resistance layer sandwiched between the contact layer and the first electrode.