US11728354B2ActiveUtilityA1

Electronic device

Assignee: SEMICONDUCTOR ENERGY LABPriority: Sep 6, 2010Filed: Aug 23, 2022Granted: Aug 15, 2023
Est. expirySep 6, 2030(~4.1 yrs left)· nominal 20-yr term from priority
H10D 30/6755H10F 39/80377H10F 39/8037H10F 39/813H10F 39/811H10F 39/806H10F 39/18H10F 39/802H01L 27/14603G09G 3/3648H01L 27/14612H01L 27/14616H01L 27/14625H01L 27/14636H01L 27/14641H01L 27/14643H01L 29/7869G09G 2354/00
82
PatentIndex Score
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Cited by
109
References
9
Claims

Abstract

An object is to provide a pixel structure of a display device including a photosensor which prevents changes in an output of the photosensor and a decrease in imaging quality. The display device has a pixel layout structure in which a shielding wire is disposed between an FD and an imaging signal line (a PR line, a TX line, or an SE line) or between the FD and an image-display signal line in order to reduce or eliminate parasitic capacitance between the FD and a signal line for the purpose of suppressing changes in the potential of the FD. An imaging power supply line, image-display power supply line, a GND line, a common line, or the like whose potential is fixed, such as a common potential line, is used as a shielding wire.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. An electronic device comprising:
 a photodiode; 
 a first transistor; 
 a second transistor; and 
 a third transistor, 
 wherein a first electrode of the photodiode is electrically connected to a first wire, 
 wherein a second electrode of the photodiode is electrically connected to one of a source and a drain of the first transistor, 
 wherein the other of the source and the drain of the first transistor is electrically connected to a gate of the second transistor, 
 wherein one of a source and a drain of the second transistor is electrically connected to a second wire, 
 wherein the other of the source and the drain of the second transistor is electrically connected to one of a source and a drain of the third transistor, 
 wherein the other of the source and the drain of the third transistor is electrically connected to a third wire, 
 wherein a gate of the first transistor is electrically connected to a fourth wire, 
 wherein a gate of the third transistor is electrically connected to a fifth wire, 
 wherein the first wire is electrically connected to a sixth wire, 
 wherein the first wire and the sixth wire cross each other, and 
 wherein the first wire and the fifth wire cross each other. 
 
     
     
       2. The electronic device according to  claim 1 ,
 wherein a node is electrically connected to the other of the source and the drain of the first transistor and the gate of the second transistor, 
 wherein a seventh wire is supplied with a fixed potential, and 
 wherein the seventh wire is between the node and the first wire. 
 
     
     
       3. The electronic device according to  claim 2 , wherein the seventh wire is a power supply line. 
     
     
       4. The electronic device according to  claim 2 , wherein the seventh wire is a GND line. 
     
     
       5. The electronic device according to  claim 2 , wherein the seventh wire is a common potential line. 
     
     
       6. An electronic device comprising:
 a photodiode; 
 a first transistor; 
 a second transistor; and 
 a third transistor, 
 wherein a first electrode of the photodiode is electrically connected to a first wire, 
 wherein a second electrode of the photodiode is electrically connected to one of a source and a drain of the first transistor, 
 wherein the other of the source and the drain of the first transistor is electrically connected to a gate of the second transistor, 
 wherein one of a source and a drain of the second transistor is electrically connected to a second wire, 
 wherein the other of the source and the drain of the second transistor is electrically connected to one of a source and a drain of the third transistor, 
 wherein the other of the source and the drain of the third transistor is electrically connected to a third wire, 
 wherein a gate of the first transistor is electrically connected to a fourth wire, 
 wherein a gate of the third transistor is electrically connected to a fifth wire, 
 wherein the first wire is electrically connected to a sixth wire, 
 wherein a node is electrically connected to the other of the source and the drain of the first transistor and the gate of the second transistor, 
 wherein a seventh wire is supplied with a fixed potential, and 
 wherein the seventh wire is between the node and the first wire. 
 
     
     
       7. The electronic device according to  claim 6 , wherein the seventh wire is a power supply line. 
     
     
       8. The electronic device according to  claim 6 , wherein the seventh wire is a GND line. 
     
     
       9. The electronic device according to  claim 6 , wherein the seventh wire is a common potential line.

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