US11595945B2ActiveUtilityA1

System information scheduling in machine type communication

Assignee: PANASONIC IP CORP AMERICAPriority: Apr 10, 2015Filed: May 7, 2021Granted: Feb 28, 2023
Est. expiryApr 10, 2035(~8.7 yrs left)· nominal 20-yr term from priority
H04W 4/70H04W 72/12H04W 72/23H04L 5/0053H04W 72/30H04W 48/12H04W 72/0446H04W 72/005
74
PatentIndex Score
0
Cited by
37
References
9
Claims

Abstract

The present disclosure relates to an apparatus for receiving system information in a wireless communication system including a receiver that receives system information configuration information and receives system information in predetermined subframes of a radio interface, and a controller that determines the predetermined subframes according to the received system information configuration information and controls the receiver to receive the system information in the predetermined subframes, wherein the system information configuration information includes a subframe scheduling field with a plurality of bits, each bit being associated with a subframe and representing whether or not system information is to be received in that subframe. The present disclosure further relates to a corresponding apparatus for transmitting system information and to the respective receiving and transmitting methods.

Claims

exact text as granted — not AI-modified
The invention claimed is: 
     
       1. An integrated circuit configured to control an apparatus for receiving system information in a wireless communication system, the integrated circuit comprising:
 receiving circuitry, which, in operation, receives system information configuration information; and 
 control circuitry, which is coupled to the receiving circuitry and which, in operation, determines first subframes for receiving the system information according to the system information configuration information, 
 wherein, 
 the system information configuration information indicates whether multimedia broadcast scheduling information is used to indicate second subframes for use in multimedia broadcast communication; 
 when the system information configuration information indicates the multimedia broadcast scheduling information is used to indicate the second subframes, the first subframes are defined exclusive of the second subframes; 
 when the system information configuration information indicates the multimedia broadcast scheduling information is not used, the first subframes are defined according to a subframe scheduling field included in the system information configuration information, each one of bits in the subframe scheduling field indicating whether a corresponding subframe is the first subframe; and 
 the receiving circuitry receives the system information in the first subframes. 
 
     
     
       2. The integrated according to  claim 1 , wherein:
 a number of the bits in the subframe scheduling field is less than or equal to a number of the subframes in a radio frame; 
 none of the bits is associated with a subframe used for reception of the system information configuration information, a subframe used for a physical broadcast channel, or a subframe configured for the multimedia broadcast communication; and 
 the system information is received only in subframes indicated by the bits in the subframe scheduling field as the first subframes. 
 
     
     
       3. The integrated according to  claim 1 , wherein
 the system information configuration information is received either within a master information message of a radio resource control protocol carried on a physical broadcast channel or within a system information message of the radio resource control protocol scheduled in the master information message, and 
 the system information configuration information includes an indication of frequency resources for the system information including at least one of: (i) at least one of a location and a number of physical resource blocks reserved for the system information, and (ii) whether frequency hopping is applied. 
 
     
     
       4. The integrated according to  claim 1 , wherein
 the apparatus is a machine type communication (MTC) terminal; 
 the system information is MTC system information; and 
 none of the bits in the subframe scheduling field is associated with a subframe carrying system information for other types of communication. 
 
     
     
       5. The integrated according to  claim 1 , wherein
 the system information configuration information includes:
 a first subframe scheduling field and a second subframe scheduling field, each including subfields for respective subframes; and 
 scheduling information indicating to which frames the second subframe scheduling field applies, and 
 
 the second subframe scheduling field is applied to the frames indicated by the scheduling information whereas the first subframe scheduling field is applied to any other frames. 
 
     
     
       6. The integrated according to  claim 5 , wherein
 the second subframe scheduling field has no bits associated with any predefined subframes, and 
 the system information configuration information includes a first bitmap application bit for indicating whether the bits in the first subframe scheduling field are to be applicable for the frames indicated in the scheduling information. 
 
     
     
       7. The integrated according to  claim 1 , wherein
 the receiving circuitry, in operation, receives a master information message on a physical broadcast channel, the master information message including scheduling information concerning subframe scheduling of a first system information which includes the system information configuration information, and 
 none of the bits in the subframe scheduling field is associated with a subframe indicated as carrying the first system information in the scheduling information. 
 
     
     
       8. The integrated according to  claim 7 , wherein the scheduling information consists of a predefined number of predefined combinations of at least two of: first system information size, subframes in which the first system information can be scheduled, application of frequency hopping, frequency hopping pattern and frequency allocation. 
     
     
       9. The integrated circuit according to  claim 1 , wherein the bits in the subframe scheduling field are 10 or 40 bits long.

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