US11563079B2ActiveUtilityA1
Metal insulator metal (MIM) structure and manufacturing method thereof
Assignee: TAIWAN SEMICONDUCTOR MFG CO LTDPriority: Jan 8, 2020Filed: Jan 8, 2020Granted: Jan 24, 2023
Est. expiryJan 8, 2040(~13.5 yrs left)· nominal 20-yr term from priority
H01L 28/60H01G 4/20H01G 13/00H01G 4/08H10D 1/692H01G 4/10H01G 4/232H01G 4/236H01G 4/33H01G 4/1272H01G 4/012
96
PatentIndex Score
4
Cited by
24
References
20
Claims
Abstract
A MIM structure and manufacturing method thereof are provided. The MIM structure includes a substrate having a first surface and a metallization structure over the substrate. The metallization structure includes a bottom electrode layer, a dielectric layer on the bottom electrode layer, a ferroelectric layer on the dielectric layer, a top electrode layer on the ferroelectric layer, a first contact electrically coupled to the top electrode layer, and a second contact penetrating the dielectric layer and the ferroelectric layer, electrically coupled to the bottom electrode layer.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1. A metal insulator metal (MIM) structure, comprising:
a substrate; and
a metallization structure over the substrate, comprising:
a bottom electrode layer;
a dielectric layer on the bottom electrode layer;
a ferroelectric layer on the dielectric layer, wherein the ferroelectric layer is substantially made of lead zirconate titanate (PZT), BaTiO 3 (BTO), or barium strontium titanate (BST), and a thickness of the ferroelectric layer is greater than a thickness of the dielectric layer;
a top electrode layer on the ferroelectric layer;
a first contact electrically coupled to the top electrode layer; and
a second contact penetrating the dielectric layer and the ferroelectric layer, electrically coupled to the bottom electrode layer.
2. The MIM structure of claim 1 , wherein a dielectric constant of the ferroelectric layer is higher than a dielectric constant of the dielectric layer.
3. The MIM structure of claim 1 , wherein a thickness of the dielectric layer is in a range of from about 1 nm to about 3 nm.
4. The MIM structure of claim 1 , further comprising:
a first capping layer over the top electrode layer;
a second capping layer over the first capping layer and the ferroelectric layer; and
a third capping layer over the second capping layer.
5. The MIM structure of claim 4 , wherein the bottom electrode layer comprises:
a plurality of first protrusions in contact with the dielectric layer.
6. The MIM structure of claim 5 , wherein a top surface of each of the plurality of first protrusions is lower than a bottom surface of the second capping layer.
7. The MIM structure of claim 5 , wherein the bottom electrode layer comprises:
a plurality of trenches each has a U-shape extending toward the substrate.
8. The MIM structure of claim 7 , wherein the top electrode layer comprises a plurality of second protrusions extending into the plurality of trenches, and the plurality of second protrusions are laterally surrounded by an inter-metal dielectric (IMD) layer.
9. The MIM structure of claim 5 , wherein a number of the plurality of first protrusions are free from covered by the first capping layer.
10. A capacitor structure, comprising:
an N th metal layer;
a bottom electrode layer over the N th metal layer;
at least a stack structure on the bottom electrode layer, each of the stack structures comprising:
a dielectric layer; and
a ferroelectric layer on the dielectric layer, wherein the ferroelectric layer is substantially made of lead zirconate titanate (PZT), BaTiO 3 (BTO), or barium strontium titanate (BST), and a thickness of the ferroelectric layer is greater than a thickness of the dielectric layer;
a top electrode layer on the stack structure; and
an (N+1)th metal layer over the top electrode layer.
11. The capacitor structure of claim 10 , wherein the bottom electrode layer has a plurality of first protrusions.
12. The capacitor structure of claim 11 , wherein the plurality of first protrusions are laterally surrounded by the stack structure.
13. The capacitor structure of claim 10 , wherein the bottom electrode layer has a plurality of trenches each comprising a U-shape extending toward the substrate.
14. The capacitor structure of claim 13 , wherein the top electrode layer has a plurality of second protrusions extending into the plurality of trenches.
15. The capacitor structure of claim 14 , wherein the stack structure is extended into the plurality of trenches and laterally surrounds the second protrusions.
16. The capacitor structure of claim 10 , wherein a thickness of the ferroelectric layer over the dielectric layer is greater than about 10 nm.
17. A method for manufacturing a metal insulator metal (MIM) structure, the method comprising:
providing a substrate;
forming a bottom electrode layer over the substrate;
forming a dielectric layer on the bottom electrode layer;
forming a ferroelectric layer on the dielectric layer;
forming a top electrode layer on the ferroelectric layer; and
forming a first contact electrically coupled to the top electrode and a second contact electrically coupled to the bottom electrode layer, wherein the second contact penetrates the dielectric layer and the ferroelectric layer;
wherein forming the ferroelectric layer comprises performing an in-situ doping operation.
18. The method of claim 17 , further comprising:
forming a plurality of mandrel patterns on a top surface of the bottom electrode layer;
forming an electrode layer covers the mandrel patterns and the bottom electrode layer;
removing the electrode layer from a top surface of the mandrel patterns and thereby exposing the mandrel patterns; and
removing the mandrel patterns.
19. The method of claim 17 , further comprising:
forming a first inter-metal dielectric (IMD) layer over the substrate; and
forming a plurality of trenches at a top surface to the first IMD layer.
20. The method of claim 17 , further comprising:
forming a first capping layer over the top electrode layer;
forming a second capping layer over the first capping layer and the ferroelectric layer;
forming a third capping layer over the second capping layer;
forming a second IMD layer over the third capping layer and the first IMD layer; and
forming an opening in the first capping layer, the second capping layer, the third capping layer, and the second IMD layer prior to forming the first contact.Join the waitlist — get patent alerts
Track US11563079B2 — get alerts on status changes and closely related new filings.
We store only your email — no account needed. See our privacy policy.