Display apparatuses, gate drive circuits, shift register units and driving methods thereof
Abstract
The present disclosure provides display apparatuses, gate drive circuits, shift register units and driving methods thereof. The shift register unit includes: an outputting module, configured to output a composite output signal under a control of a potential of a pull-up node; a pull-up module, configured to charge the pull-up node under a control of a display control signal terminal and charge the pull-up node under a control of a potential of a black insertion node; a first reset circuit configured to, under a control of the reset signal terminal and the potential of the black insertion node, control a voltage control node to communicate with the pull-up node; a current-limiting circuit, connected between the voltage control node and a first voltage terminal; and a charging module, configured to charge the voltage control node under the control of the potential of the pull-up node.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1. A shift register unit, comprising:
an outputting module, connected with a pull-up node and configured to output a composite output signal under a control of a potential of the pull-up node;
a pull-up module, connected with a display control signal terminal, a black insertion node and the pull-up node, and configured to charge the pull-up node under a control of the display control signal terminal and charge the pull-up node under a control of a potential of the black insertion node;
a reset and leakage prevention composite module, comprising a first reset circuit and a current-limiting circuit, wherein the first reset circuit is connected with a reset signal terminal, a voltage control node, the black insertion node and the pull-up node and is configured to, under a control of the reset signal terminal and the potential of the black insertion node, control the voltage control node to communicate with the pull-up node; the current-limiting circuit is connected between the voltage control node and a first voltage terminal; and
a charging module, connected with the voltage control node and the pull-up node and configured to charge the voltage control node under the control of the potential of the pull-up node.
2. The shift register unit of claim 1 , wherein the current-limiting circuit is connected with the black insertion node, and is configured to control the first voltage terminal to communicate with the voltage control node under the control of the potential of the black insertion node.
3. The shift register unit of claim 2 , wherein the current-limiting circuit comprises:
a leakage prevention transistor, wherein a control pole of the leakage prevention transistor is connected with the black insertion node, a first pole of the leakage prevention transistor is connected with the voltage control node, and a second pole of the leakage prevention transistor is connected with the first voltage terminal.
4. The shift register unit of claim 2 , wherein the current-limiting circuit comprises:
an auxiliary reset transistor, wherein a control pole of the auxiliary reset transistor is connected with the reset signal terminal, and a first pole of the auxiliary reset transistor is connected with the voltage control node; and
a leakage prevention transistor, wherein a control pole of the leakage prevention transistor is connected with the black insertion node, a first pole of the leakage prevention transistor is connected with a second pole of the auxiliary reset transistor, and a second pole of the leakage prevention transistor is connected with the first voltage terminal.
5. The shift register unit of claim 1 , wherein the current-limiting circuit comprises:
a current-limiting transistor, wherein a control pole and a first pole of the current-limiting transistor are both connected with the voltage control node, a second pole of the current-limiting transistor is connected with the first voltage terminal, and the current-limiting transistor is configured to turn on when a potential of the first pole of the current-limiting transistor is greater than a potential of the second pole of the current-limiting transistor.
6. The shift register unit of claim 1 , further comprising:
a black insertion node controlling module, connected with the black insertion node, a first charge node and a clock signal terminal, and configured to charge the first charge node under a control of the clock signal terminal and control the first charge node to communicate with the black insertion node under the control of the clock signal terminal; and
the charging module is further connected with the first charge node and the black insertion node and is configured to, under a control of the potentials of the black insertion node and the pull-up node, control the first charge node to communicate with the voltage control node.
7. The shift register unit of claim 1 , further comprising:
a compensating module, comprising a compensation control circuit and a compensation output circuit,
wherein the compensation control circuit is connected with the display control signal terminal, a compensation control signal terminal, a second charge node and a compensation node and is configured to, under a control of the compensation control signal terminal, control the display control signal terminal to communicate with the second charge node, and under the control of the compensation control signal terminal, control the compensation node to communicate with the second charge node; and
the compensation output circuit is connected with the compensation node, a clock signal terminal and the pull-up node, and is configured to charge the pull-up node under a control of the compensation node and the clock signal terminal.
8. The shift register unit of claim 7 , wherein the charging module is further connected with the second charge node and the compensation node and is configured to, under a control of the compensation node and the potential of the pull-up node, control the second charge node to communicate with the voltage control node.
9. The shift register unit of claim 1 , wherein the pull-up module comprises:
a display input circuit, connected with the display control signal terminal, the pull-up node and the voltage control node and configured to, under the control of the display control signal terminal, charge the voltage control node, and under the control of the display control signal terminal, control the voltage control node to communicate with the pull-up node.
10. A gate drive circuit, comprising a plurality of cascaded shift register units, wherein each of the shift register units comprises:
an outputting module, connected with a pull-up node and configured to output a composite output signal under a control of a potential of the pull-up node;
a pull-up module, connected with a display control signal terminal, a black insertion node and the pull-up node, and configured to charge the pull-up node under a control of the display control signal terminal and charge the pull-up node under a control of a potential of the black insertion node;
a reset and leakage prevention composite module, comprising a first reset circuit and a current-limiting circuit, wherein the first reset circuit is connected with a reset signal terminal, a voltage control node, the black insertion node and the pull-up node and is configured to, under a control of the reset signal terminal and the potential of the black insertion node, control the voltage control node to communicate with the pull-up node; the current-limiting circuit is connected between the voltage control node and a first voltage terminal; and
a charging module, connected with the voltage control node and the pull-up node and configured to charge the voltage control node under the control of the potential of the pull-up node.
11. The gate drive circuit of claim 10 , wherein the current-limiting circuit is connected with the black insertion node, and is configured to control the first voltage terminal to communicate with the voltage control node under the control of the potential of the black insertion node.
12. The gate drive circuit of claim 11 , wherein the current-limiting circuit comprises:
a leakage prevention transistor, wherein a control pole of the leakage prevention transistor is connected with the black insertion node, a first pole of the leakage prevention transistor is connected with the voltage control node, and a second pole of the leakage prevention transistor is connected with the first voltage terminal.
13. The gate drive circuit of claim 11 , wherein the current-limiting circuit comprises:
an auxiliary reset transistor, wherein a control pole of the auxiliary reset transistor is connected with the reset signal terminal, and a first pole of the auxiliary reset transistor is connected with the voltage control node; and
a leakage prevention transistor, wherein a control pole of the leakage prevention transistor is connected with the black insertion node, a first pole of the leakage prevention transistor is connected with a second pole of the auxiliary reset transistor, and a second pole of the leakage prevention transistor is connected with the first voltage terminal.
14. The gate drive circuit of claim 10 , wherein the current-limiting circuit comprises:
a current-limiting transistor, wherein a control pole and a first pole of the current-limiting transistor are both connected with the voltage control node, a second pole of the current-limiting transistor is connected with the first voltage terminal, and the current-limiting transistor is configured to turn on when a potential of the first pole of the current-limiting transistor is greater than a potential of the second pole of the current-limiting transistor.
15. The gate drive circuit of claim 10 , wherein the shift register unit further comprises:
a black insertion node controlling module, connected with the black insertion node, a first charge node and a clock signal terminal, and configured to charge the first charge node under a control of the clock signal terminal and control the first charge node to communicate with the black insertion node under the control of the clock signal terminal; and
the charging module is further connected with the first charge node and the black insertion node and is configured to, under a control of the potentials of the black insertion node and the pull-up node, control the first charge node to communicate with the voltage control node.
16. The gate drive circuit of claim 10 , wherein the shift register unit further comprises:
a compensating module, comprising a compensation control circuit and a compensation output circuit,
wherein the compensation control circuit is connected with the display control signal terminal, a compensation control signal terminal, a second charge node and a compensation node and is configured to, under a control of the compensation control signal terminal, control the display control signal terminal to communicate with the second charge node, and under the control of the compensation control signal terminal, control the compensation node to communicate with the second charge node; and
the compensation output circuit is connected with the compensation node, a clock signal terminal and the pull-up node, and is configured to charge the pull-up node under a control of the compensation node and the clock signal terminal.
17. The gate drive circuit of claim 16 , wherein the charging module is further connected with the second charge node and the compensation node and is configured to, under a control of the compensation node and the potential of the pull-up node, control the second charge node to communicate with the voltage control node.
18. The gate drive circuit of claim 10 , wherein the pull-up module comprises:
a display input circuit, connected with the display control signal terminal, the pull-up node and the voltage control node and configured to, under the control of the display control signal terminal, charge the voltage control node, and under the control of the display control signal terminal, control the voltage control node to communicate with the pull-up node.
19. A display apparatus, comprising a gate drive circuit comprising a plurality of cascaded shift register units, wherein each of the shift register units comprises:
an outputting module, connected with a pull-up node and configured to output a composite output signal under a control of a potential of the pull-up node;
a pull-up module, connected with a display control signal terminal, a black insertion node and the pull-up node and configured to, under a control of the display control signal terminal, charge the pull-up node, and under a control of a potential of the black insertion node, charge the pull-up node;
a reset and leakage prevention composite module, comprising a first reset circuit and a current-limiting circuit, wherein the first reset circuit is connected with a reset signal terminal, a voltage control node, the black insertion node and the pull-up node and is configured to, under a control of the reset signal terminal and the potential of the black insertion node, control the voltage control node to communicate with the pull-up node; the current-limiting circuit is connected between the voltage control node and a first voltage terminal; and
a charging module, connected with the voltage control node and the pull-up node and configured to charge the voltage control node under the control of the potential of the pull-up node.
20. A driving method of a shift register unit, applicable to the shift register unit of claim 1 and the driving method comprising:
enabling the outputting module to output a composite output signal under the control of the potential of the pull-up node;
enabling the pull-up module to charge the pull-up node under the control of the display control signal terminal and charge the pull-up node under the control of the potential of the black insertion node;
enabling the first reset circuit to, under the control of the reset signal terminal and the potential of the black insertion node, control the voltage control node to communicate with the pull-up node; and
enabling the charging module to, under the control of the potential of the pull-up node, charge the voltage control node.Join the waitlist — get patent alerts
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