US11050398B2ActiveUtilityA1

Large input current detection and fast response optical receiver

Assignee: ANALOG DEVICES INTERNATIONAL UNLIMITED COPriority: Jan 16, 2019Filed: Jan 16, 2019Granted: Jun 29, 2021
Est. expiryJan 16, 2039(~12.5 yrs left)· nominal 20-yr term from priority
Inventors:Wei-Chung Wang
H03F 3/45475H03F 1/086H03F 1/523H03F 2200/471H03F 2200/75H03F 2200/441H03F 2200/462H03F 2200/78H03F 3/087H03F 2200/481H03F 2203/45616H03F 3/082H03F 2200/72
47
PatentIndex Score
0
Cited by
18
References
20
Claims

Abstract

A clamp circuit can control a clamp transistor such that a change in a photodiode current detection voltage signal in an optical receiver circuit can control the clamp transistor to change state when a difference of a clamp voltage and the photodiode current detection voltage signal exceeds a threshold voltage of the clamp transistor. Using a feedback loop, the clamp circuit can accurately clamp a current when the photodiode current is larger than a detect current threshold.

Claims

exact text as granted — not AI-modified
The claimed invention is: 
     
       1. A low power and fast response optical receiver circuit, the circuit comprising:
 a clamp circuit including:
 a clamp transistor, the clamp circuit configured to operate the clamp transistor such that a change in a photodiode current detection voltage signal controls the clamp transistor to change state when a magnitude of a difference of a clamp voltage and the photodiode current detection voltage signal exceeds a threshold voltage magnitude of the clamp transistor; 
 a first amplifier circuit configured to generate the clamp voltage in response to a difference between a clamp reference voltage and the photodiode current detection voltage signal; and 
 a resistor coupled across two terminals of the clamp transistor, wherein the photodiode current detection voltage signal is generated by a photodiode current through the resistor. 
 
 
     
     
       2. The circuit of  claim 1 , wherein the clamp circuit comprises:
 a capacitor, 
 wherein a first terminal of the clamp transistor is configured to be coupled to the clamp voltage and a second terminal of the clamp transistor is configured to be coupled to the photodiode current detection voltage signal. 
 
     
     
       3. The circuit of  claim 2 , wherein the clamp circuit comprises:
 a first switch configured to couple an output of the first amplifier circuit to the capacitor; 
 a second switch configured to couple and hold the clamp voltage on the capacitor to allow the clamp voltage on the first terminal of the clamp transistor to settle when a photodiode current toggles from a first state to a second state. 
 
     
     
       4. The circuit of  claim 3 , wherein the first switch and the second switch are controlled in a complementary manner in response to an output signal of the optical receiver circuit. 
     
     
       5. The circuit of  claim 3 , further comprising:
 a second amplifier circuit coupled to the second switch and configured to couple the clamp voltage to the capacitor. 
 
     
     
       6. The circuit of  claim 3 , further comprising:
 a comparator circuit configured to compare a reference voltage and the photodiode current detection voltage signal and generate an output signal of the optical receiver circuit. 
 
     
     
       7. The circuit of  claim 6 , further comprising:
 at least one logic gate coupled between an output of the comparator circuit and the first and second switches, wherein the at least one logic gate is configured to provide a delay between when the output signal of the comparator circuit is generated and when the first and second switches operate. 
 
     
     
       8. The circuit of  claim 1 , wherein the transistor is an N-type field-effect transistor coupled to an upper supply voltage. 
     
     
       9. A low power and fast response method of operating an optical receiver circuit, the method comprising:
 generating a photodiode current detection voltage signal in response to a photodiode current through a resistor coupled across two terminals of a clamp transistor; 
 generating a clamp voltage in response to a difference between a clamp reference voltage and the photodiode current detection voltage signal; and 
 controlling a clamp transistor to change state when a magnitude of a difference of the clamp voltage and the photodiode current detection voltage signal exceeds a threshold voltage magnitude of the clamp transistor. 
 
     
     
       10. The method of  claim 9 , further comprising:
 coupling a first terminal of the clamp transistor to the clamp voltage and a second terminal of the clamp transistor to the photodiode current detection voltage signal. 
 
     
     
       11. The method of  claim 9 , further comprising:
 coupling a first switch to an output of the first amplifier circuit to a capacitor; 
 controlling a second switch to couple and hold the clamp voltage on the capacitor to allow the clamp voltage on a first terminal of the clamp transistor to settle when a photodiode current toggles from a first state to a second state. 
 
     
     
       12. The method of  claim 11 , further comprising:
 while the first switch is OFF during a first time, operating the first amplifier circuit to generate the clamp voltage. 
 
     
     
       13. The method of  claim 11 , further comprising:
 controlling the first switch and the second switch in response to an output signal of the optical receiver circuit. 
 
     
     
       14. The method of  claim 13 , further comprising
 controlling the first switch and the second switch in complementary manner. 
 
     
     
       15. The method of  claim 13 , wherein controlling the first switch and the second switch in response to the output signal of the optical receiver circuit includes:
 providing a time delay to the output signal of the optical receiver circuit. 
 
     
     
       16. The method of  claim 9 , further comprising:
 comparing a reference voltage and the photodiode current detection voltage signal and generating an output signal of the optical receiver circuit. 
 
     
     
       17. A low power and fast response optical receiver circuit, the circuit comprising:
 a clamp transistor and a resistor coupled across two terminals of the clamp transistor, wherein a photodiode current detection voltage signal is generated by a photodiode current through the resistor; 
 means for generating a clamp voltage in response to a difference between a clamp reference voltage and the photodiode current detection voltage signal; and 
 means for controlling a clamp transistor to change state when a magnitude of a difference of the clamp voltage and the photodiode current detection voltage signal exceeds a threshold voltage magnitude of the clamp transistor. 
 
     
     
       18. The circuit of  claim 17 , further comprising:
 first means for coupling an output of the first amplifier circuit to a capacitor; 
 second means for coupling and holding the clamp voltage on the capacitor to allow the clamp voltage on a first terminal of the clamp transistor to settle when a photodiode current toggles from a first state to a second state. 
 
     
     
       19. The circuit of  claim 18 , further comprising:
 means for providing a time delay to an output signal of the optical receiver circuit to control the first means for coupling and the second means for coupling. 
 
     
     
       20. The circuit of  claim 18 , wherein the first means for coupling and the second means for coupling are controlled in a complementary manner in response to an output signal of the optical receiver circuit.

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