Read disturb detection and recovery with adaptive thresholding for 3-D NAND storage
Abstract
A system includes memory cells arranged in blocks and a memory controller. The memory controller receives a read command to read a first block. The first block can be associated with a first read count and a first read threshold. The first read count is incremented when the first block is read, and when the first read count reaches the read threshold, a read reclaim test is performed. The first read count is set to zero after a power off or a read reclaim operation. When the first read count is zero, an adaptive read threshold is selected based on the number of bit errors. Further, in a read reclaim test, the number of bit errors is tested against an adaptive error threshold to determine whether a garbage collection operation is performed.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1. A non-volatile data storage device, comprising:
a plurality of memory cells arranged in blocks; and
a memory controller coupled to the plurality of memory cells for controlling data write and read in the plurality of memory cells;
wherein the memory controller is configured to:
receive a read command to read a first block, the first block being associated with a first read count and a first read threshold, wherein the first read count represents a number of read operations of the first block that has been performed, and the first read threshold represents a number of read operations that triggers a read test operation;
set the first read threshold as a target read threshold;
determine whether the first read count is equal to zero;
in response to determining that the first read count is equal to zero, select a second read threshold as the target read threshold, wherein selecting the second read threshold includes:
performing a test read to determine a number of bit errors associated with a plurality of blocks associated with the first block;
selecting the second read threshold based on the number of bit errors; and
setting the second read threshold as the target read threshold;
perform a read operation of the first block;
increment the first read count;
determine whether the first read count exceed the target read threshold;
in response to determining that the first read count is equal to a multiple of the target read threshold:
perform a test read operation to determine a number of bit errors associated with the plurality of blocks associated with the first block;
determine whether the number of bit errors exceeds an error threshold, the error threshold being selected based on the number of bit errors;
in response to determining that the number of bit errors exceeds the error threshold:
perform a read reclaim operation in the plurality of blocks associated with the first block; and
clear the first read count associated with the first block.
2. The device of claim 1 , wherein the read reclaim operation comprises copying valid values from the plurality of the memory cells to another plurality of memory cells.
3. The device of claim 1 , wherein the error threshold is a percentage of an error correction capability of the device, the percentage being selected based on the number of bit errors.
4. The device of claim 1 , wherein the error threshold is a percentage of an error correction capability of the device, the percentage being selected based on the target read threshold.
5. The device of claim 1 , wherein performing a test read to determine a number of bit errors comprises: performing a read operation of an expanded block associated with the first block; perform error correction decoding to determine a number of bit errors in each block in the expanded block; and determine a highest number of bit errors among the blocks in the expanded block.
6. The device of claim 5 , wherein the expanded block comprises neighboring blocks most affected by reading the first block.
7. The device of claim 6 , wherein the expanded block further comprises, in a 3-D NAND storage system, pages associated with a word line at a higher level than the first block and pages associated with a word line at a lower level than the first block.
8. The device of claim 1 , wherein the first read count is set to 0 after a power off.
9. The device of claim 1 , wherein the memory controller is configured to select the second read threshold from a lookup table based on the number of bit errors.
10. The device of claim 9 , wherein the lookup table comprises decreasing second read thresholds for increasing number of bit errors.
11. A system, comprising:
a plurality of memory cells arranged in blocks; and
a memory controller coupled to the plurality of memory cells for controlling data write and read in the plurality of memory cells;
wherein the memory controller is configured to:
receive a read command to read a first block, the first block being associated with a first read count and a first read threshold, wherein the first read count represents a number of read operations of the first block that has been performed, and the first read threshold represents a number of read operations that triggers a read test operation;
determine whether the first read count is equal to zero;
in response to determining that the first read count is equal to zero, select a second read threshold as a target read threshold based on bit errors associated with the first block;
in response to determining that the first read count is not equal to zero, select the first read threshold as the target read threshold;
perform a read operation;
increment the first read count;
determine whether the first read count is equal to a multiple of the target read threshold;
in response to determining that the first read count exceeds the target read threshold, perform a read reclaim operation based on comparing the first read count with the target read threshold.
12. The system of claim 11 , wherein selecting the second read threshold comprises: performing a test read to determine a number of bit errors associated with a plurality of blocks associated with the first block; and selecting the second read threshold based on the number of bit errors.
13. The system of claim 11 , wherein the memory controller is configured to: perform a test read operation to determine a number of bit errors associated with a plurality of blocks associated with the first block;
determine whether the number of bit errors exceeds an error threshold, the error threshold being selected based on the number of bit errors;
in response to determining that the number of bit errors exceeds the error threshold:
perform a read reclaim operation in the plurality of blocks associated with the first block; and
clear the first read count associated with the first block.
14. The system of claim 13 , wherein the error threshold is a percentage of an error correction capability of the system, the percentage being selected based on the number of bit errors.
15. The system of claim 11 , wherein the read reclaim operation comprises copying valid values from the plurality of the memory cells to another plurality of memory cells.
16. A method of controlling a storage system, the storage system including a plurality of memory cells arranged in blocks and a memory controller coupled to the plurality of memory cells for controlling data write and read in the plurality of memory cells, the method comprising:
receiving a read command to read a first block, the first block being associated with a first read count and a first read threshold, wherein the first read count represents a number of read operations of the first block that has been performed, and the first read threshold represents a number of read operations that triggers a read test operation;
determining whether the first read count is equal to zero;
in response to determining that the first read count is equal to zero, selecting a second read threshold as a target read threshold based on bit errors associated with the first block;
in response to determining that the first read count is not equal to zero, selecting the first read threshold as the target read threshold;
performing a read operation;
incrementing the first read count;
determining whether the first read count is equal to a multiple of the target read threshold;
in response to determining that the first read count exceeds the target read threshold, performing a read reclaim operation based on comparing the first read count with the target read threshold.
17. The method of claim 16 , wherein selecting the second read threshold comprises: performing a test read to determine a number of bit errors associated with a plurality of blocks associated with the first block; and selecting the second read threshold based on the number of bit errors.
18. The method of claim 16 , further comprising:
performing a test read operation to determine a number of bit errors associated with a plurality of blocks associated with the first block;
determining whether the number of bit errors exceeds an error threshold, the error threshold being selected based on the number of bit errors;
in response to determining that the number of bit errors exceeds the error threshold:
performing a read reclaim operation in the plurality of blocks associated with the first block; and
clearing the first read count associated with the first block.
19. The method of claim 18 , wherein the error threshold is a percentage of an error correction capability of the storage system, the percentage being selected based on the number of bit errors.
20. The method of claim 16 , wherein the read reclaim operation comprises copying valid values from the plurality of the memory cells to another plurality of memory cells.Join the waitlist — get patent alerts
Track US10714195B2 — get alerts on status changes and closely related new filings.
We store only your email — no account needed. See our privacy policy.