Combination storage and processing device

Abstract

A combination storage and processing device is disclosed. A large scale integrated circuit which incorporates both random access memory storage for individual data elements and circuits which process data elements according to a fixed set of instructions is disclosed. When directed by controlling software or hardware, a plurality of the individual data elements stored in the random access memory storage are pushed through the circuits which perform fixed operations upon the data elements and return them to random access memory storage. This allows operations to be performed on the plurality of data elements without sending them through a data bus to the central processing unit of a general purpose computing device, increasing efficiency and overall computing speed.

What is claimed and sought to be protected by Letters Patent is: 
     
       1. A combination storage and processing device comprising:
 a) an integrated circuit, the integrated circuit containing a plurality of data storage elements and a plurality of in-line computation units; 
 b) a plurality of transfer pathways connecting the plurality of data storage elements and the plurality of in-line computation units such that when a plurality of individual data values stored in the plurality of data storage elements are transferred through the plurality of transfer pathways into the plurality of in-line computation units, the plurality of in-line computation units will perform a computational operation on the plurality of individual data values and transfer a plurality of computed data values back to the plurality of data storage elements through the plurality of transfer pathways; 
 c) a first list-defining pathway connecting at least two of the plurality of data storage elements, the first list-defining pathway comprising one of the plurality of transfer pathways, the at least two of the plurality of data storage elements connected by the first list-defining pathway comprising a first list of data storage elements; 
 d) a first list subset of the plurality of in-line computation units, each of the plurality of in-line computation units in the first list subset connected to at least one of the plurality of data storage elements in the first list of data storage elements via the plurality of transfer pathways; 
 e) a result list-defining pathway connecting at least two of the plurality of data storage elements not part of the first list of data storage elements, the result list-defining pathway comprising one of the plurality of transfer pathways which is not the first list-defining pathway and is not one of the plurality of transfer pathways connecting the first list subset of the plurality of in-line computation units to the first list of data storage elements; and, 
 f) a result list of data storage elements comprising the at least two of the plurality of data storage elements connected by the result list-defining pathway such that the first list subset of the plurality of in-line computation units are each connected to one of the result list of data storage elements via the plurality of transfer pathways such that a plurality of data values can be stored in the first list of data storage elements, the plurality of data values can be sent to the first list subset of the plurality of in-line computation units, the first list subset of the plurality of in-line computation units can perform a computation operation on the plurality of data values generating a plurality of computed data values, and the plurality of computed data values can be sent to the result list of data storage elements. 
 
     
     
       2. The combination storage and processing device of  claim 1  further comprising:
 a) a second list-defining pathway connecting at least two of the plurality of data storage elements which are not part of the first list of data storage elements or the result list of data storage elements, the second list-defining pathway comprising one of the plurality of transfer pathways which is not the first list-defining pathway or the result list-defining pathway, the at least two of the plurality of data storage elements connected by the second list-defining pathway comprising a second list of data storage elements, the second list of data storage elements storing a second plurality of data values and connected to the first list subset of the plurality of in-line computation units via the plurality of transfer pathways such that the plurality of data values and the second plurality of data values can move through the plurality of transfer pathways to the first list subset of the plurality of in-line computation units, the first list subset of the plurality of in-line computation units can perform a plurality of computations on the plurality of data values and the second plurality of data values to produce the plurality of computed data values, and the first list subset of the plurality of in-line computation units can transfer the plurality of computed data values to the result list of data storage elements. 
 
     
     
       3. The combination storage and processing device of  claim 1  wherein the result list of data storage elements comprises a single result data storage element, and the first list subset of the plurality of in-line computation units perform a plurality of computations on the plurality of data values resulting in a single result data value, the first list subset of the plurality of in-line computation units storing the single result data value in the single result data storage element. 
     
     
       4. The combination storage and processing device of  claim 2  wherein the result list of data storage elements comprises a single result data storage element, and the first list subset of the plurality of in-line computation units perform a plurality of computations on the plurality of data values and the second plurality of data values resulting in a single result data value, the first list subset of the plurality of in-line computation units storing the single result data value in the single result data storage element. 
     
     
       5. The combination storage and processing device of  claim 1  wherein:
 a) one of the plurality of data storage elements which is not part of the first list of data storage elements or the result list of data storage elements is a target data storage element, which stores a target data value, and the target data storage element is connected to the first list subset of the plurality of in-line computation units via the plurality of transfer pathways; 
 b) the plurality of data values is sent to each of the first list subset of the plurality of in-line computation units along with the target data value, each of the first list subset of the plurality of in-line computation units receiving one and only one of the plurality of data values; 
 c) each of the first list subset of the plurality of in-line computation units performs the computation operation on the one and only one of the plurality of data values and the target data value, wherein the computation operation is a comparison, and produces a comparison result value which indicates the result of the comparison; and, 
 d) the comparison result value is sent to one and only one member of the result list of data storage elements. 
 
     
     
       6. The combination storage and processing device of  claim 1  wherein the computation operation is a duplication of one of the plurality of data values, resulting in the plurality of data values being identically copied to the plurality of computed data values. 
     
     
       7. The combination storage and processing device of  claim 1  wherein the computation operation is a negation of one of the plurality of data values, resulting in the plurality of data values being copied to the plurality of computed data values as a list of the negation of each of the plurality of data values. 
     
     
       8. A general purpose computing device, the general purpose computing device comprising:
 a) A central processing unit; 
 b) A persistent storage device operably connected to the central processing unit through a persistent storage bus, the persistent storage device storing a software program which can be executed by the central processing unit; 
 c) A combination storage and processing device operably connected to the central processing unit through an internal data bus, the combination storage and processing device comprising a plurality of data storage elements each capable of storing one of a plurality of individual data values, a plurality of in-line computation units each capable of performing a computation operation on the plurality of individual data values, and a plurality of transfer pathways connecting the plurality of in-line computation units to the plurality of data storage elements such that the software program can issue a plurality of commands causing the central processing unit to transfer a plurality of specific data values to the plurality of data storage elements through the internal data bus and the plurality of in-line computation units to perform the computation operation on the plurality of specific data values by transferring the plurality of specific data values from the plurality of data storage elements through the plurality of transfer pathways to the plurality of in-line computation units and the plurality of in-line computation units transferring a plurality of computed data values back to the plurality of data storage elements through the plurality of transfer pathways; 
 d) a first list-defining pathway connecting at least two of the plurality of data storage elements, the first list-defining pathway comprising one of the plurality of transfer pathways, the at least two of the plurality of data storage elements connected by the first list-defining pathway comprising a first list of data storage elements; 
 e) a first list subset comprising at least two of the plurality of in-line computation units, each of the at least two of the plurality in-line computation units in the first list subset connected to at least one of the plurality of data storage elements in the first list of data storage elements via the plurality of transfer pathways; 
 f) a result list-defining pathway connecting at least two of the plurality of data storage elements not part of the first list of data storage elements, the result list-defining pathway comprising one of the plurality of transfer pathways which is not the first list-defining pathway and is not one of the plurality of transfer pathways connecting the first list subset of the plurality of in-line computation units to the first list of data storage elements; and, 
 g) a result list of data storage elements comprising the at least two of the plurality of data storage elements connected by the result list-defining pathway such that the first list subset of the plurality of in-line computation units are each connected to one of the result list of data storage elements via the plurality of transfer pathways such that a plurality of data values can be stored in the first list of data storage elements, the plurality of data values can be sent to the first list subset of the plurality of in-line computation units, the first list subset of the plurality of in-line computation units can perform the computation operation on the plurality of data values generating a plurality of computed data values, and the plurality of computed data values can be sent to the result list of data storage elements, such that the result list of data storage elements can send the plurality of computed data values back to the central processing unit through the internal data bus. 
 
     
     
       9. The general purpose computing device of  claim 8 , wherein the result list of data storage elements comprises a single result data storage element, and the first list subset of the plurality of in-line computation units perform a plurality of computations on the plurality of data values resulting in a single result data value, the first list subset of the plurality of in-line computation units storing the single result data value in the single result data storage element. 
     
     
       10. The general purpose computing device of  claim 8 , wherein:
 a) one of the plurality of data storage elements which is not part of the first list of data storage elements or the result list of data storage elements is a target data storage element, which stores a target data value, and the target data storage element is connected to the first list subset of the plurality of in-line computation units via the plurality of transfer pathways; 
 b) the plurality of data values is sent to each of the first list subset of the plurality of in-line computation units along with the target data value, each of the first list subset of the plurality of in-line computation units receiving one and only one of the plurality of data values; 
 c) each of the first list subset of the plurality of in-line computation units performs the computation operation on the one and only one of the plurality of data values and the target data value, wherein the computation operation is a comparison, and produces a comparison result value which indicates the result of the comparison; and, 
 d) the comparison result value is sent to one and only one member of the result list of data storage elements.