US10401699B2ActiveUtilityA1
Liquid crystal display device

Assignee: SEMICONDUCTOR ENERGY LABPriority: Aug 31, 2006Filed: Sep 26, 2018Granted: Sep 3, 2019
Est. expiryAug 31, 2026(~0.1 yrs left)· nominal 20-yr term from priority
H10P 72/0454G09G 3/342G02F 1/13452G02F 1/13306G02F 1/136213G02F 1/1393G09G 3/3674G02F 1/133753G09G 3/3685G09G 2310/0286G09G 2300/0452G09G 3/3677G09G 2310/08G09G 2300/0426G11C 19/28G09G 3/3655G09G 2310/024G09G 2320/0252G09G 2330/021G02F 2202/103G02F 1/1368H01L 2251/5307H01L 51/56H01L 29/78693H01L 27/1255H01L 27/3265H01L 27/3213G02F 2001/133622H01L 27/3211H01L 27/156H01L 27/3216H01L 29/247H01L 27/1225H01L 2251/5315G02F 1/136286H01L 21/67167H01L 2251/5323H01L 27/15H01L 51/5246H01L 27/3262H01L 27/3248H01L 27/124H01L 27/3258H01L 27/3276H01L 27/06H01L 27/1222H10K 71/421H10K 59/8722H10H 29/10H10D 86/481H10D 86/441H10D 86/60H10D 84/00H10D 86/423H10D 86/421H10D 62/402H10D 62/80H10D 30/6756H10H 29/142G02F 1/133622H10K 59/1216H10K 59/124H10K 2102/3031H10K 2102/3026H10K 59/131H10K 59/351H10K 59/123H10K 59/352H10K 59/35H10K 59/1213H10K 2102/3023
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Cited by
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References
Claims
Abstract

A first transistor, a second transistor, a third transistor, a fourth transistor are provided. In the first transistor, a first terminal is electrically connected to a first wiring; a second terminal is electrically connected to a gate terminal of the second transistor; a gate terminal is electrically connected to a fifth wiring. In the second transistor, a first terminal is electrically connected to a third wiring; a second terminal is electrically connected to a sixth wiring. In the third transistor, a first terminal is electrically connected to a second wiring; a second terminal is electrically connected to the gate terminal of the second transistor; a gate terminal is electrically connected to a fourth wiring. In the fourth transistor, a first terminal is electrically connected to the second wiring; a second terminal is electrically connected to the sixth wiring; a gate terminal is connected to the fourth wiring.
Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A semiconductor device comprising:
 first to twelfth transistors, 
 wherein one of a source and a drain of the first transistor is electrically connected to one of a source and a drain of the second transistor, 
 wherein the one of the source and the drain of the first transistor is electrically connected to one of a source and a drain of the third transistor, 
 wherein the one of the source and the drain of the first transistor is electrically connected to one of a source and a drain of the fourth transistor, 
 wherein the one of the source and the drain of the first transistor is electrically connected to a first wiring, 
 wherein one of a source and a drain of the fifth transistor is electrically connected to one of a source and a drain of the sixth transistor, 
 wherein the one of the source and the drain of the fifth transistor is electrically connected to one of a source and a drain of the seventh transistor, 
 wherein the one of the source and the drain of the fifth transistor is electrically connected to one of a source and a drain of the eighth transistor, 
 wherein the one of the source and the drain of the fifth transistor is electrically connected to a gate of the first transistor, 
 wherein the one of the source and the drain of the fifth transistor is electrically connected to a gate of the twelfth transistor, 
 wherein one of a source and a drain of the ninth transistor is electrically connected to a gate of the second transistor, 
 wherein the one of the source and the drain of the ninth transistor is electrically connected to a gate of the sixth transistor, 
 wherein one of a source and a drain of the tenth transistor is electrically connected to a gate of the seventh transistor, 
 wherein one of a source and a drain of the eleventh transistor is electrically connected to one of a source and a drain of the twelfth transistor, 
 wherein the one of the source and the drain of the eleventh transistor is electrically connected to one of a gate of the ninth transistor and a gate the tenth transistor, 
 wherein the other of the source and the drain of the second transistor is electrically connected to a second wiring, 
 wherein the other of the source and the drain of the third transistor is electrically connected to the second wiring, 
 wherein the other of the source and the drain of the fourth transistor is electrically connected to the second wiring, 
 wherein the other of the source and the drain of the eighth transistor is electrically connected to the second wiring, 
 wherein a gate of the fourth transistor is electrically connected to a third wiring, 
 wherein a gate of the eighth transistor is electrically connected to the third wiring, 
 wherein the other of the source and the drain of the sixth transistor is electrically connected to the other of the source and the drain of the seventh transistor, 
 wherein the other of the source and the drain of the sixth transistor is electrically connected to the other of the source and the drain of the twelfth transistor, 
 wherein the other of the source and the drain of the ninth transistor is electrically connected to a fourth wiring, 
 wherein the other of the source and the drain of the tenth transistor is electrically connected to a fifth wiring, and 
 wherein the other of the source and the drain of the eleventh transistor is electrically connected to a gate of the eleventh transistor. 
 
     
     
       2. A semiconductor device comprising:
 first to twelfth transistors, 
 wherein one of a source and a drain of the first transistor is electrically connected to one of a source and a drain of the second transistor, 
 wherein the one of the source and the drain of the first transistor is electrically connected to one of a source and a drain of the third transistor, 
 wherein the one of the source and the drain of the first transistor is electrically connected to one of a source and a drain of the fourth transistor, 
 wherein the one of the source and the drain of the first transistor is electrically connected to a first wiring, 
 wherein one of a source and a drain of the fifth transistor is electrically connected to one of a source and a drain of the sixth transistor, 
 wherein the one of the source and the drain of the fifth transistor is electrically connected to one of a source and a drain of the seventh transistor, 
 wherein the one of the source and the drain of the fifth transistor is electrically connected to one of a source and a drain of the eighth transistor, 
 wherein the one of the source and the drain of the fifth transistor is electrically connected to a gate of the first transistor, 
 wherein the one of the source and the drain of the fifth transistor is electrically connected to a gate of the twelfth transistor, 
 wherein one of a source and a drain of the ninth transistor is electrically connected to a gate of the second transistor, 
 wherein the one of the source and the drain of the ninth transistor is electrically connected to a gate of the sixth transistor, 
 wherein one of a source and a drain of the tenth transistor is electrically connected to a gate of the seventh transistor, 
 wherein one of a source and a drain of the eleventh transistor is electrically connected to one of a source and a drain of the twelfth transistor, 
 wherein the one of the source and the drain of the eleventh transistor is electrically connected to one of a gate of the ninth transistor and a gate the tenth transistor, 
 wherein the other of the source and the drain of the second transistor is electrically connected to a second wiring, 
 wherein the other of the source and the drain of the third transistor is electrically connected to the second wiring, 
 wherein the other of the source and the drain of the fourth transistor is electrically connected to the second wiring, 
 wherein the other of the source and the drain of the eighth transistor is electrically connected to the second wiring, 
 wherein a gate of the fourth transistor is electrically connected to a third wiring, 
 wherein a gate of the eighth transistor is electrically connected to the third wiring, 
 wherein the other of the source and the drain of the sixth transistor is electrically connected to the other of the source and the drain of the seventh transistor, 
 wherein the other of the source and the drain of the sixth transistor is electrically connected to the other of the source and the drain of the twelfth transistor, 
 wherein the other of the source and the drain of the ninth transistor is electrically connected to a fourth wiring, 
 wherein the other of the source and the drain of the tenth transistor is electrically connected to a fifth wiring, 
 wherein the other of the source and the drain of the eleventh transistor is electrically connected to a gate of the eleventh transistor, 
 wherein a channel width of the first transistor is larger than a channel width of the fourth transistor, 
 wherein the channel width of the first transistor is larger than a channel width of the fifth transistor, and 
 wherein the channel width of the first transistor is larger than a channel width of the eighth transistor. 
 
     
     
       3. A semiconductor device comprising:
 first to twelfth transistors, 
 wherein one of a source and a drain of the first transistor is electrically connected to one of a source and a drain of the second transistor, 
 wherein the one of the source and the drain of the first transistor is electrically connected to one of a source and a drain of the third transistor, 
 wherein the one of the source and the drain of the first transistor is electrically connected to one of a source and a drain of the fourth transistor, 
 wherein the one of the source and the drain of the first transistor is electrically connected to a first wiring, 
 wherein one of a source and a drain of the fifth transistor is electrically connected to one of a source and a drain of the sixth transistor, 
 wherein the one of the source and the drain of the fifth transistor is electrically connected to one of a source and a drain of the seventh transistor, 
 wherein the one of the source and the drain of the fifth transistor is electrically connected to one of a source and a drain of the eighth transistor, 
 wherein the one of the source and the drain of the fifth transistor is electrically connected to a gate of the first transistor, 
 wherein the one of the source and the drain of the fifth transistor is electrically connected to a gate of the twelfth transistor, 
 wherein one of a source and a drain of the ninth transistor is electrically connected to a gate of the second transistor, 
 wherein the one of the source and the drain of the ninth transistor is electrically connected to a gate of the sixth transistor, 
 wherein one of a source and a drain of the tenth transistor is electrically connected to a gate of the seventh transistor, 
 wherein one of a source and a drain of the eleventh transistor is electrically connected to one of a source and a drain of the twelfth transistor, 
 wherein the one of the source and the drain of the eleventh transistor is electrically connected to one of a gate of the ninth transistor and a gate the tenth transistor, 
 wherein the other of the source and the drain of the second transistor is electrically connected to a second wiring, 
 wherein the other of the source and the drain of the third transistor is electrically connected to the second wiring, 
 wherein the other of the source and the drain of the fourth transistor is electrically connected to the second wiring, 
 wherein the other of the source and the drain of the eighth transistor is electrically connected to the second wiring, 
 wherein a gate of the fourth transistor is electrically connected to a third wiring, 
 wherein a gate of the eighth transistor is electrically connected to the third wiring, 
 wherein the other of the source and the drain of the sixth transistor is electrically connected to the other of the source and the drain of the seventh transistor, 
 wherein the other of the source and the drain of the sixth transistor is electrically connected to the other of the source and the drain of the twelfth transistor, 
 wherein the other of the source and the drain of the ninth transistor is electrically connected to a fourth wiring, 
 wherein the other of the source and the drain of the tenth transistor is electrically connected to a fifth wiring, 
 wherein the other of the source and the drain of the eleventh transistor is electrically connected to a gate of the eleventh transistor, 
 wherein a channel width of the first transistor is larger than a channel width of the fourth transistor, 
 wherein the channel width of the first transistor is larger than a channel width of the fifth transistor, 
 wherein the channel width of the first transistor is larger than a channel width of the eighth transistor, and 
 wherein a channel region of the first transistor has a U-shaped region. 
 
     
     
       4. A semiconductor device comprising:
 first to twelfth transistors, 
 wherein one of a source and a drain of the first transistor is directly connected to one of a source and a drain of the second transistor, 
 wherein the one of the source and the drain of the first transistor is directly connected to one of a source and a drain of the third transistor, 
 wherein the one of the source and the drain of the first transistor is directly connected to one of a source and a drain of the fourth transistor, 
 wherein the one of the source and the drain of the first transistor is directly connected to a first wiring, 
 wherein one of a source and a drain of the fifth transistor is directly connected to one of a source and a drain of the sixth transistor, 
 wherein the one of the source and the drain of the fifth transistor is directly connected to one of a source and a drain of the seventh transistor, 
 wherein the one of the source and the drain of the fifth transistor is directly connected to one of a source and a drain of the eighth transistor, 
 wherein the one of the source and the drain of the fifth transistor is directly connected to a gate of the first transistor, 
 wherein the one of the source and the drain of the fifth transistor is directly connected to a gate of the twelfth transistor, 
 wherein one of a source and a drain of the ninth transistor is directly connected to a gate of the second transistor, 
 wherein the one of the source and the drain of the ninth transistor is directly connected to a gate of the sixth transistor, 
 wherein one of a source and a drain of the tenth transistor is directly connected to a gate of the seventh transistor, 
 wherein one of a source and a drain of the eleventh transistor is directly connected to one of a source and a drain of the twelfth transistor, 
 wherein the one of the source and the drain of the eleventh transistor is directly connected to one of a gate of the ninth transistor and a gate the tenth transistor, 
 wherein the other of the source and the drain of the second transistor is directly connected to a second wiring, 
 wherein the other of the source and the drain of the third transistor is directly connected to the second wiring, 
 wherein the other of the source and the drain of the fourth transistor is directly connected to the second wiring, 
 wherein the other of the source and the drain of the eighth transistor is directly connected to the second wiring, 
 wherein a gate of the fourth transistor is directly connected to a third wiring, 
 wherein a gate of the eighth transistor is directly connected to the third wiring, 
 wherein the other of the source and the drain of the sixth transistor is directly connected to the other of the source and the drain of the seventh transistor, 
 wherein the other of the source and the drain of the sixth transistor is directly connected to the other of the source and the drain of the twelfth transistor, 
 wherein the other of the source and the drain of the ninth transistor is directly connected to a fourth wiring, 
 wherein the other of the source and the drain of the tenth transistor is directly connected to a fifth wiring, and 
 wherein the other of the source and the drain of the eleventh transistor is directly connected to a gate of the eleventh transistor. 
 
     
     
       5. A semiconductor device comprising:
 first to twelfth transistors, 
 wherein one of a source and a drain of the first transistor is directly connected to one of a source and a drain of the second transistor, 
 wherein the one of the source and the drain of the first transistor is directly connected to one of a source and a drain of the third transistor, 
 wherein the one of the source and the drain of the first transistor is directly connected to one of a source and a drain of the fourth transistor, 
 wherein the one of the source and the drain of the first transistor is directly connected to a first wiring, 
 wherein one of a source and a drain of the fifth transistor is directly connected to one of a source and a drain of the sixth transistor, 
 wherein the one of the source and the drain of the fifth transistor is directly connected to one of a source and a drain of the seventh transistor, 
 wherein the one of the source and the drain of the fifth transistor is directly connected to one of a source and a drain of the eighth transistor, 
 wherein the one of the source and the drain of the fifth transistor is directly connected to a gate of the first transistor, 
 wherein the one of the source and the drain of the fifth transistor is directly connected to a gate of the twelfth transistor, 
 wherein one of a source and a drain of the ninth transistor is directly connected to a gate of the second transistor, 
 wherein the one of the source and the drain of the ninth transistor is directly connected to a gate of the sixth transistor, 
 wherein one of a source and a drain of the tenth transistor is directly connected to a gate of the seventh transistor, 
 wherein one of a source and a drain of the eleventh transistor is directly connected to one of a source and a drain of the twelfth transistor, 
 wherein the one of the source and the drain of the eleventh transistor is directly connected to one of a gate of the ninth transistor and a gate the tenth transistor, 
 wherein the other of the source and the drain of the second transistor is directly connected to a second wiring, 
 wherein the other of the source and the drain of the third transistor is directly connected to the second wiring, 
 wherein the other of the source and the drain of the fourth transistor is directly connected to the second wiring, 
 wherein the other of the source and the drain of the eighth transistor is directly connected to the second wiring, 
 wherein a gate of the fourth transistor is directly connected to a third wiring, 
 wherein a gate of the eighth transistor is directly connected to the third wiring, 
 wherein the other of the source and the drain of the sixth transistor is directly connected to the other of the source and the drain of the seventh transistor, 
 wherein the other of the source and the drain of the sixth transistor is directly connected to the other of the source and the drain of the twelfth transistor, 
 wherein the other of the source and the drain of the ninth transistor is directly connected to a fourth wiring, 
 wherein the other of the source and the drain of the tenth transistor is directly connected to a fifth wiring, 
 wherein the other of the source and the drain of the eleventh transistor is directly connected to a gate of the eleventh transistor, 
 wherein a channel width of the first transistor is larger than a channel width of the fourth transistor, 
 wherein the channel width of the first transistor is larger than a channel width of the fifth transistor, and 
 wherein the channel width of the first transistor is larger than a channel width of the eighth transistor. 
 
     
     
       6. A semiconductor device comprising:
 first to twelfth transistors, 
 wherein one of a source and a drain of the first transistor is directly connected to one of a source and a drain of the second transistor, 
 wherein the one of the source and the drain of the first transistor is directly connected to one of a source and a drain of the third transistor, 
 wherein the one of the source and the drain of the first transistor is directly connected to one of a source and a drain of the fourth transistor, 
 wherein the one of the source and the drain of the first transistor is directly connected to a first wiring, 
 wherein one of a source and a drain of the fifth transistor is directly connected to one of a source and a drain of the sixth transistor, 
 wherein the one of the source and the drain of the fifth transistor is directly connected to one of a source and a drain of the seventh transistor, 
 wherein the one of the source and the drain of the fifth transistor is directly connected to one of a source and a drain of the eighth transistor, 
 wherein the one of the source and the drain of the fifth transistor is directly connected to a gate of the first transistor, 
 wherein the one of the source and the drain of the fifth transistor is directly connected to a gate of the twelfth transistor, 
 wherein one of a source and a drain of the ninth transistor is directly connected to a gate of the second transistor, 
 wherein the one of the source and the drain of the ninth transistor is directly connected to a gate of the sixth transistor, 
 wherein one of a source and a drain of the tenth transistor is directly connected to a gate of the seventh transistor, 
 wherein one of a source and a drain of the eleventh transistor is directly connected to one of a source and a drain of the twelfth transistor, 
 wherein the one of the source and the drain of the eleventh transistor is directly connected to one of a gate of the ninth transistor and a gate the tenth transistor, 
 wherein the other of the source and the drain of the second transistor is directly connected to a second wiring, 
 wherein the other of the source and the drain of the third transistor is directly connected to the second wiring, 
 wherein the other of the source and the drain of the fourth transistor is directly connected to the second wiring, 
 wherein the other of the source and the drain of the eighth transistor is directly connected to the second wiring, 
 wherein a gate of the fourth transistor is directly connected to a third wiring, 
 wherein a gate of the eighth transistor is directly connected to the third wiring, 
 wherein the other of the source and the drain of the sixth transistor is directly connected to the other of the source and the drain of the seventh transistor, 
 wherein the other of the source and the drain of the sixth transistor is directly connected to the other of the source and the drain of the twelfth transistor, 
 wherein the other of the source and the drain of the ninth transistor is directly connected to a fourth wiring, 
 wherein the other of the source and the drain of the tenth transistor is directly connected to a fifth wiring, 
 wherein the other of the source and the drain of the eleventh transistor is directly connected to a gate of the eleventh transistor, 
 wherein a channel width of the first transistor is larger than a channel width of the fourth transistor, 
 wherein the channel width of the first transistor is larger than a channel width of the fifth transistor, 
 wherein the channel width of the first transistor is larger than a channel width of the eighth transistor, and 
 wherein a channel region of the first transistor has a U-shaped region.
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