Interconnect agent

Abstract

A method for modifying an address in a multi-processor system may include performing a first transaction to modify an address between a first processor and an interconnect agent associated with the first processor and storing data for the address on the interconnect agent. The method may further include performing a second transaction to modify an address between the interconnect agent and a memory associated with a second processor and storing the data in the memory.

I claim: 
     
       1. An interconnect agent comprising:
 data storage; and 
 logic to:
 detect a request for ownership sent from a first processor to a second processor, the request for ownership associated with an address; 
 apply a coherence protocol to the address; 
 transmit a grant of ownership to the first processor; 
 receive a write message from the first processor, the write message including data for the address; 
 transmit an acknowledgement to the first processor; and 
 store the data in the data storage. 
 
 
     
     
       2. The interconnect agent according to  claim 1 , further comprising logic to:
 receive a grant of ownership from the second processor; 
 transmit a write message to a memory associated with the second processor, the write message including the data for the address; and 
 receive an acknowledgement from the memory. 
 
     
     
       3. The interconnect agent according to  claim 1 , further comprising logic to track a status of the address. 
     
     
       4. The interconnect agent according to  claim 3 , further comprising logic to maintain a local coherence domain for the first processor. 
     
     
       5. The interconnect agent according to  claim 4 , further comprising logic to maintain a coherence domain for the second processor. 
     
     
       6. A system comprising:
 a first processor; 
 an interconnect agent coupled to the first processor, the interconnect agent having data storage; 
 an interconnect network coupled to the interconnect agent; 
 a second processor coupled to the interconnect network; and 
 a memory coupled to the second processor; 
 wherein the interconnect agent to:
 detect a request for ownership sent from the first processor to the second processor, the request for ownership associated with an address; 
 transmit a grant of ownership to the first processor; 
 receive a write message from the first processor, the write message including data for the address; 
 transmit an acknowledgement to the first processor. 
 
 
     
     
       7. The system according to  claim 6 , wherein the interconnect agent is further to apply a coherence protocol to the address. 
     
     
       8. The system according to  claim 6 , wherein the interconnect agent is further to store the data in the data storage. 
     
     
       9. The system according to  claim 6 , wherein the interconnect agent is further to:
 receive a grant of ownership from the second processor; 
 transmit a write message to the memory, the write message including the data for the address; and 
 receive an acknowledgement from the memory. 
 
     
     
       10. The system according to  claim 9 , wherein the second processor is to store the data in the memory. 
     
     
       11. The system according to  claim 6 , wherein the interconnect agent is further to track a status of the address. 
     
     
       12. A method comprising:
 detecting, by an interconnect agent, a request for ownership sent from a first processor to a second processor, the request for ownership associated with an address; 
 transmitting, by the interconnect agent, a grant of ownership to the first processor; 
 receiving a write message from the first processor, the write message including data for the address; and 
 transmitting an acknowledgement to the first processor. 
 
     
     
       13. The method of  claim 12 , further comprising tracking a status of the address. 
     
     
       14. The method of  claim 13 , wherein the status of the address is tracked using a resource on the interconnect agent. 
     
     
       15. The method of  claim 13 , further comprising maintaining a local coherence domain for the first processor. 
     
     
       16. The method of  claim 14 , further comprising maintaining a coherence domain for the second processor. 
     
     
       17. The method of  claim 12 , further comprising applying a coherence protocol to the address. 
     
     
       18. The method of  claim 12 , further comprising storing the data in data storage.