US10291180B2ActiveUtilityA1

Crystal oscillator circuit and method thereof

Assignee: REALTEK SEMICONDUCTOR CORPPriority: Oct 6, 2017Filed: Oct 6, 2017Granted: May 14, 2019
Est. expiryOct 6, 2037(~11.2 yrs left)· nominal 20-yr term from priority
Inventors:Chia-Liang Lin
H03B 5/364H03B 5/32H03K 5/08H03B 2200/009H03B 5/36
80
PatentIndex Score
2
Cited by
16
References
14
Claims

Abstract

A crystal oscillator comprises: an inverter configured to receive a first voltage at a first node and output a second voltage at a second node; a feedback network inserted between the first node and the second node, wherein the feedback network includes a serial connection of a first feedback resistor, a clamp network, and a second feedback resistor; a first optional resistor inserted between the second node and a third node; a second optional resistor inserted between a fourth node and the first node; a crystal inserted between the third node and the fourth node; a first shunt capacitor inserted between the third node and a ground node; and a second shunt capacitor inserted between the fourth node to and the ground node.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A crystal oscillator comprising:
 an inverter configured to receive a first voltage at a first node and output a second voltage at a second node; 
 a feedback network inserted between the first node and the second node, wherein the feedback network includes a serial connection of a first feedback resistor, a clamp network, and a second feedback resistor; 
 a crystal inserted between a third node and a fourth node, wherein the third node is coupled to the second node, and the fourth node is coupled to the first node; 
 a first shunt capacitor inserted between the third node and a ground node; and 
 a second shunt capacitor inserted between the fourth node to and the ground node. 
 
     
     
       2. The crystal oscillator of  claim 1 , wherein the crystal oscillator further comprises:
 a first optional resistor inserted between the second node and the third node; and 
 a second optional resistor inserted between the fourth node and the first node. 
 
     
     
       3. The crystal oscillator of  claim 1 , wherein the clamp network comprises a parallel connection of a first diode placed in a forward direction, a second diode placed in a reverse direction, and a feedback capacitor. 
     
     
       4. The crystal oscillator of  claim 1 , wherein the inverter comprises a NMOS (n-channel metal oxide semiconductor) transistor and a PMOS (p-channel metal oxide semiconductor) transistor configured in a complementary common-source amplifier topology. 
     
     
       5. The crystal oscillator of  claim 3 , wherein both the first diode and the second diode comprise a MOS (metal-oxide semiconductor) transistor configured in a diode-connected topology. 
     
     
       6. A method comprising:
 incorporating an inverter to amplify a first voltage at a first node into a second voltage at a second node; 
 inserting a crystal between a third node and a fourth node, wherein the third node is coupled to the second node, and the fourth node is coupled to the first node; 
 inserting a first shunt capacitor between the third node and a ground node; 
 inserting a second shunt capacitor between the fourth node and the ground node; and 
 inserting a feedback network between the second node and the first node, wherein the feedback network includes a serial connection of a first feedback resistor, a clamp network, and a second feedback resistor. 
 
     
     
       7. The method of  claim 6 , wherein the method further comprises:
 inserting a first optional resistor between the second node and the third node; and 
 inserting a second optional resistor between the first node and the fourth node. 
 
     
     
       8. The method of  claim 6 , wherein the clamp network comprises a parallel connection of a first diode placed in a forward direction, a second diode placed in a reverse direction, and a feedback capacitor. 
     
     
       9. The method of  claim 6 , wherein the inverter comprises a NMOS (n-channel metal oxide semiconductor) transistor and a PMOS (p-channel metal oxide semiconductor) transistor configured in a complementary common source amplifier topology. 
     
     
       10. The method of  claim 8 , wherein both the first diode and the second diode comprise a MOS (metal-oxide semiconductor) transistor configured in a diode-connected topology. 
     
     
       11. A crystal oscillator comprising:
 an inverter configured to receive a first voltage at a first node and output a second voltage at a second node; 
 a feedback network inserted between the first node and the second node, wherein the feedback network includes a serial connection of a first feedback resistor, a clamp network, and a second feedback resistor, wherein the clamp circuit is configured to act as an open circuit when the difference between the first voltage and the second voltage is smaller than a predetermined amount; 
 a crystal inserted between a third node and a fourth node, wherein the third node is coupled to the second node, and the fourth node is coupled to the first node; 
 a first shunt capacitor inserted between the third node and a ground node; and 
 a second shunt capacitor inserted between the fourth node to and the ground node. 
 
     
     
       12. The crystal oscillator of  claim 11 , wherein the clamp network comprises a parallel connection of a first diode placed in a forward direction, a second diode placed in a reverse direction, and a feedback capacitor. 
     
     
       13. The crystal oscillator circuit of  claim 11 , further comprising a first resistor interposed between the second node and a third node. 
     
     
       14. The crystal oscillator circuit of  claim 12 , further comprising a second resistor interposed between a fourth node and the first node.

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