Display device
Abstract
The purpose of the invention is suppressing a kink phenomenon and improving the image quality of a display device. The display device has a TFT in a pixel. The TFT has a semiconductor layer, a first insulating layer under the semiconductor layer, a second insulating layer over the semiconductor layer, and a gate electrode facing the semiconductor layer with a gap. The gate electrode has a first gate electrode portion facing a lower surface of the semiconductor layer, a second gate electrode portion facing an upper surface of the semiconductor layer, and a third gate electrode portion facing a lateral surface of the semiconductor layer and connected to the first and second gate electrode portions. A laminated part where the first and second insulating layers are stacked is around the semiconductor layer, and a part of the laminated part is between the lateral surface and the third gate electrode portion.
Claims
exact text as granted — not AI-modifiedThe invention claimed is:
1. A display device, comprising:
thin film transistors each provided to each of a plurality of pixels arranged in a matrix, wherein
each of the thin film transistors includes
a semiconductor layer,
a first insulating layer formed under the semiconductor layer,
a second insulating layer formed over the semiconductor layer, and
a gate electrode opposed to the semiconductor layer and separated from the semiconductor layer,
the semiconductor layer includes
a source region,
a drain region,
a channel region between the source region and the drain region,
an upper surface,
a lower surface, and
a lateral surface connected to the upper surface and the lower surface and having a part contained in the channel region,
the gate electrode includes
a first gate electrode portion opposed to the lower surface of the semiconductor layer via the first insulating layer,
a second gate electrode portion opposed to the upper surface of the semiconductor layer via the second insulating layer, and
a third gate electrode portion opposed to the lateral surface of the semiconductor layer, and contacting the first gate electrode portion and the second gate electrode portion,
the second gate electrode portion has an overlapping part overlapping with the semiconductor layer and the third gate electrode portion in a plan view and a protruding part touching with the overlapping part without overlapping the semiconductor layer and third gate electrode portion in the plan view,
the overlapping part has a distance between a first side crossing two sides of the semiconductor layer in the plan view and a second side parallel to the first side and crossing the two sides of the semiconductor layer in the plan view,
a width of the protruding part measured from a first side of the protruding part parallel to the first side of the overlapping part to a second side of the protruding part parallel to the second side of the overlapping part is smaller than the distance,
a laminated part where the first insulating layer and the second insulating layer are stacked each other is located around the semiconductor layer, and
a part of the laminated part is positioned between the lateral surface of the semiconductor layer and the third gate electrode portion.
2. The display device according to claim 1 , wherein the semiconductor layer includes
a first part overlapping, in the plan view, either one of the first gate electrode and the second gate electrode portion, and
a second part projecting, in the plan view, from the first part to a side opposite from the semiconductor layer, and overlapping neither the first gate electrode nor the second gate electrode portion.
3. The display device according to claim 1 , wherein
the channel region of the semiconductor layer includes
a pair of first overlapping areas overlapping, in the plan view, both of the first gate electrode portion and the second gate electrode portion, and
a pair of second overlapping areas overlapping, in the plan view, either one of the first gate electrode portion and the second gate electrode portion,
the pair of first overlapping areas are opposed to each other in a direction from the source region to the drain region, and
each of the pair of the second overlapping areas is positioned adjacent to each of the pair of the first overlapping areas in the pair.
4. The display device according to claim 1 , wherein
one of the first gate electrode portion and the second gate electrode portion has a cut-out hollowing in a direction intersecting a direction from the source region to the drain region, and
a part of the semiconductor layer is positioned in a non-overlapping area positioned inside the cut-out and not overlapping, in the plan view, the one of the first gate electrode portion and the second gate electrode portion.
5. The display device according to claim 4 , wherein
a wire is positioned in the non-overlapping area, and
the wire is electrically connected to the semiconductor layer at a surface opposed to one of the upper surface and the lower surface.
6. The display device according to claim 5 , wherein the wire is electrically connected to one of the source region and the drain region.
7. The display device according to claim 1 , wherein
the laminated part has a contact hole formed at a position opposed to the lateral surface of the semiconductor layer, and
the third gates electrode portion is formed in the contact hole.
8. The display device according to claim 7 , wherein
the first gate electrode portion has a first area opposed to the semiconductor layer,
the second gate electrode portion has a second area opposed to the semiconductor layer,
the contact hole has a pair of end portions positioned in a direction from the source region to the drain region, and
the pair of end portions of the contact hole overlap, in the plan view, one of the first area and the second area and do not overlap an other of the first area and the second area.
9. The display device according to claim 1 , wherein
the first gate electrode portion has a projecting area projecting from the first insulating layer and the second insulating layer in the plan view, and
the third gate electrode portion is connected to the first gate electrode portion via the projecting area.
10. The display device according to claim 1 , wherein the first insulating layer and the second insulating layer are not in contact with an opposite surface of the third gate electrode portion from the semiconductor layer.
11. The display device according to claim 1 , wherein
the third gate electrode portion has a pair of end portions positioned in a direction from the source region to the drain region, and
the pair of end portions of the third gate electrode portion overlap, in the plan view, the first gate electrode portion and the second gate electrode portion.
12. The display device according to claim 11 , wherein
the first gate electrode portion has a first area opposed to the semiconductor layer,
the second gate electrode portion has a second area opposed to the semiconductor layer,
the third gate electrode portion has a third area opposed to the semiconductor layer,
the third area has a pair of end portions positioned on respective both sides in the direction from the source region to the drain region, and
the pair of end portions of the third area overlap, in the plan view, the first area and the second area.
13. The display device according to claim 1 , wherein
the lateral surface of the semiconductor layer includes a first lateral surface and a second lateral surface opposed to the first lateral surface via the channel region, and
the third gate electrode portion is opposed to both of the first lateral surface and the second lateral surface.
14. The display device according to claim 1 , wherein
the lateral surface of the semiconductor layer includes a first lateral surface and a second lateral surface opposed to the first lateral surface via the channel region, and
the third gate electrode portion is opposed to either one of the first lateral surface and the second lateral surface.
15. The display device according to claim 1 , wherein
the lateral surface of the semiconductor layer includes a first lateral surface and a second lateral surface opposed to the first lateral surface via the channel region, and
the third gate electrode portion includes a plurality of first separated parts separated from each other and opposed to the first lateral surface.
16. The display device according to claim 15 , wherein the third gate electrode portion includes a plurality of second separated parts separated from each other and opposed to the second lateral surface.
17. The display device according to claim 1 , wherein
the semiconductor layer has a branched part that is branched to extend from one of the two sides of the semiconductor layer in a direction intersecting a direction from the source region to the drain region,
the branched part has a width in the direction from the source region to the drain region from a first side of the branched part to a second side of the branched part that is smaller than an entire length in the direction from the source region to the drain region of the one of the two sides of the semiconductor from which it extends, and
the branched part is branched from the channel region.
18. The display device according to claim 17 , wherein at least one of the first gate electrode portion and the second gate electrode portion includes a branched gate electrode portion opposed to the branched part.
19. The display device according to claim 17 , wherein the branched part is electrically connected to one of the source region and the drain region.
20. The display device according to claim 1 , wherein the overlapping part and the protruding part together form a T-shape in the plan view.Join the waitlist — get patent alerts
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