Methods for clocking an image sensor

Abstract

A method of binning charges in a charge coupled device (CCD) image sensor is described. The frequency at which an HCCD in the CCD image sensor is clocked may be a multiple of the frequency at which a summing element coupled to the end of the HCCD is clocked, such that charges may be binned at a gate within the HCCD or at the summing element before being read out. The clock signal for the summing element may have a 50% duty cycle in order to provide additional time for charge to flow across an output gate to a floating diffusion node in an output stage of the CCD image sensor. For cases where the HCCD clock frequency is more than twice the summing element clock frequency, charges may be binned at the summing element. Otherwise, charges may be binned at another gate within the HCCD.

What is claimed is: 
     
       1. A method for binning charges in a charge coupled device (CCD) image sensor comprising:
 with a horizontal CCD (HCCD), receiving charges from an array of vertical CCDs (VCCDs); 
 with a control circuit, providing a first HCCD control signal to a first subset of elements within the HCCD, wherein the first HCCD control signal has a first frequency; 
 with the control circuit, providing a second HCCD control signal to a second subset of elements within the HCCD, and wherein the second HCCD control signal has the first frequency; 
 in response to receiving the second HCCD control signal, binning charges from first and second photosensitive elements coupled to the array of VCCDs using one of the second subset of elements within the HCCD; 
 with the control circuit, providing a summing control signal to a summing element in an output stage of the CCD, wherein the summing control signal has a second frequency with a 50 percent duty cycle, and wherein the first frequency is three times the second frequency; 
 in response to receiving the summing control signal, adding charges from a third photosensitive element coupled to the array of VCCDs to the binned charges from the first and second photosensitive elements using the summing element; and 
 transferring only the charges from the first, second, and third photosensitive elements from the summing element to a floating diffusion node before receiving additional charges at the summing element. 
 
     
     
       2. The method defined in  claim 1 , wherein the second HCCD control signal is 180 degrees out of phase with the first HCCD control signal. 
     
     
       3. The method defined in  claim 2 , wherein each element in the first and second subsets of elements comprises a gate, and wherein elements of the first subset of elements are interposed between elements of the second subset of elements in an alternating pattern. 
     
     
       4. The method defined in  claim 3 , wherein the summing element is coupled to the HCCD. 
     
     
       5. The method defined in  claim 4 , wherein the summing element comprises a summing gate. 
     
     
       6. The method defined in  claim 5 , wherein the summing gate is coupled to the floating diffusion node through an output gate. 
     
     
       7. The method defined in  claim 6 , wherein the floating diffusion node is coupled to a floating diffusion amplifier. 
     
     
       8. The method defined in  claim 7  further comprising:
 binning charges together at an element of the HCCD that is adjacent to the summing element. 
 
     
     
       9. The method defined in  claim 8  further comprising:
 binning charges together at the summing gate of the summing element. 
 
     
     
       10. A method for binning charges in a charge coupled device (CCD) image sensor having a horizontal CCD (HCCD) and an array of photosensitive elements, the method comprising:
 with a control circuit, providing a first clock signal to a first group of elements of the HCCD, wherein the first clock signal oscillates at a first frequency; 
 with the control circuit, providing a second clock signal to a second group of elements of the HCCD, wherein the second clock signal oscillates at the first frequency, and wherein the first and second clock signals are complimentary signals; 
 in response to receiving the second clock signal, combining charges from first and second photosensitive elements of the array of photosensitive elements using one of the second group of elements of the HCCD; 
 with the control circuit, providing a summing clock signal to a summing element, wherein the summing clock signal oscillates at a second frequency that is different than the first frequency, and wherein the summing clock signal has a 50% duty cycle; 
 in response to receiving the summing clock signal, combining charges from a third photosensitive element of the array of photosensitive elements with the combined charges from the first and second photosensitive elements using the summing element; and 
 transferring only the charges from the first, second, and third photosensitive elements from the summing element to a floating diffusion node before receiving additional charges at the summing element. 
 
     
     
       11. The method defined in  claim 10 , wherein the first frequency is three times the second frequency, and wherein binning the number of adjacent charges together further comprises:
 binning every three adjacent charges together at the summing element. 
 
     
     
       12. A charge coupled device (CCD) image sensor comprising:
 an array of photosensitive elements; 
 a horizontal CCD (HCCD); 
 an output stage coupled to the HCCD; and 
 a control circuit coupled to the HCCD and to the output stage, wherein the control circuit is configured to provide first and second complementary control signals to the HCCD at a first frequency, and to provide a summing signal with a 50 percent duty cycle to a summing element at a second frequency, wherein the HCCD combines charges from three selected photosensitive elements of the array of photosensitive elements in response to receiving the summing signal before transferring the combined charges from only the three selected photosensitive elements from the summing element to a floating diffusion node before receiving additional charges at the summing element, and wherein the first frequency is three times the second frequency. 
 
     
     
       13. The apparatus defined in  claim 12 , wherein the output stage comprises:
 an output gate that is coupled to the summing element, 
 wherein the output gate is coupled between the summing element and the floating diffusion node; 
 a reset gate coupled to the floating diffusion node; and 
 a floating diffusion amplifier coupled to a floating diffusion node.