Transadmittance amplifier

Abstract

Embodiments describe a transadmittance amplifier comprising an inverting output port and a non-inverting output port. The transadmittance amplifier comprising a first differential transistor pair having a first transistor comprising an inverting input port. The first transistor is configured to provide an output current to the inverting output port. A second transistor comprising a non-inverting input port. The second transistor is configured to provide an output current to the non-inverting output port. A second differential transistor pair having a third transistor comprising an inverting input port and a fourth transistor comprising a non-inverting input port. A first current source and a second current source. The transadmittance amplifier comprises a first current mirror which is configured to mirror an output current of the fourth transistor to the inverting output port and a second current mirror which is configured to mirror an output current of the third transistor to the non-inverting output port.

What is claimed is: 
     
       1. A transadmittance amplifier comprising:
 an inverting output port; 
 a non-inverting output port; 
 a first differential transistor pair comprising:
 a first transistor comprising an inverting input port, wherein the first transistor is configured to provide an output current to the inverting output port; and 
 a second transistor comprising a non-inverting input port and being configured to provide an output current to the non-inverting output port; 
 
 a second differential transistor pair comprising:
 a third transistor comprising an inverting input port; and 
 a fourth transistor comprising a non-inverting input port; 
 a first current source configured to apply a first biasing current having a first current intensity to the first differential transistor pair; 
 a second current source configured to apply a second biasing current having a second current intensity to the second differential transistor pair; 
 a first current mirror configured to mirror an output current of the fourth transistor to the inverting output port; 
 a second current mirror configured to mirror an output current of the third transistor to the non-inverting output port; 
 
 a transadmittance-transimpedance amplifier, wherein the transadmittance-transimpedance amplifier comprises: 
 
       a transimpedance stage, wherein the transimpedance stage comprises:
 a third current source; 
 a differential push-pull amplifier comprising a first set of push-pull transistors and a second set of push-pull transistors; 
 a pair of feedback resistors comprising a first and a second feedback resistor, wherein the first feedback resistor is coupled between an inverting output port of the transimpedance stage and the inverting output port of the transadmittance amplifier; and 
 the second feedback resistor is coupled between a non-inverting output port of the transimpedance stage and the non-inverting output port of the transadmittance amplifier. 
 
     
     
       2. The transadmittance amplifier of  claim 1 , wherein the transadmittance amplifier is configured with a predefined ratio of the first current intensity to the second current intensity. 
     
     
       3. The predefined ration of  claim 2 , wherein the predefined ratio of the first current intensity to the second current intensity is in a range between 2 and 8. 
     
     
       4. The transadmittance amplifier of  claim 2 , wherein
 the current intensity of the second biasing current is a fraction 1/N of the current intensity of the first biasing current, wherein N is a real number; 
 a transconductance value g m2  of the third and the fourth transistor is a fraction 1/N of a transconductance value g m1  of the first and the second transistor; and 
 the first and the second current mirror are configured to mirror the output current of the fourth and the third transistor respectively with a mirror ratio of 1:N. 
 
     
     
       5. The transadmittance amplifier of  claim 1 , wherein the first, the second, the third and the fourth transistor are embodied as field effect transistors. 
     
     
       6. The transadmittance amplifier of  claim 5 , wherein
 the source of the first transistor and the source of the second transistor are coupled to each other; 
 the first current source is coupled to the source of the first transistor and to the source of the second transistor; 
 the second current source is coupled to the source of the third transistor and to the source of the fourth transistor; 
 the drain of the first transistor and the drain of the fourth transistor are coupled via the first current mirror the each other; 
 the drain of the second transistor and the drain of the third transistor are coupled via the second current mirror the each other; 
 the drain of the first transistor is coupled to the inverting output port and the drain of the second transistor is coupled the non-inverting output port; 
 the gate of the first transistor forms the inverting input port of the first transistor; 
 the gate of the second transistor forms the non-inverting input port of the second transistor; 
 the gate of the third transistor forms the inverting input port of the third transistor; and 
 the gate of the fourth transistor forms the non-inverting input port of the fourth transistor. 
 
     
     
       7. The transadmittance amplifier of  claim 1 , wherein the transadmittance amplifier is a variable gain amplifier. 
     
     
       8. The transadmittance amplifier of  claim 6 , wherein the first current source and the second current source are programmable current sources to program the gain of the variable gain amplifier. 
     
     
       9. The transadmittance-transimpedance amplifier of  claim 1 , wherein the first and the second feedback resistor are tunable to tune a driving capability of the transadmittance-transimpedance amplifier. 
     
     
       10. The transadmittance-transimpedance amplifier of  claim 1 , further comprising:
 an optical receiver, comprising: 
 a transadmittance-transimpedance amplifier according to  claim 1 ;
 a photodiode; 
 
 a transimpedance amplifier arranged between the photodiode and the input of the transadmittance-transimpedance amplifier; and 
 a digital feedback equalizer being configured to receive a differential output signal of the transadmittance-transimpedance amplifier. 
 
     
     
       11. A design structure tangibly embodied in a machine readable medium for designing, manufacturing, or testing an integrated circuit, the design structure comprising:
 an inverting output port; 
 a non-inverting output port; 
 a first differential transistor pair having 
 a first transistor comprising an inverting input port and being configured to provide an output current to the inverting output port; 
 a second transistor comprising a non-inverting input port and being configured to provide an output current to the non-inverting output port;
 a second differential transistor pair having 
 a third transistor comprising an inverting input port; and 
 a fourth transistor comprising a non-inverting input port; 
 a first current source configured to apply a first biasing current having a first current intensity to the first differential transistor pair; 
 a second current source configured to apply a second biasing current having a second current intensity to the second differential transistor pair; 
 a first current mirror configured to mirror an output current of the fourth transistor to the inverting output port; 
 a second current mirror configured to mirror an output current of the third transistor to the non-inverting output port; 
 
 a transadmittance-transimpedance amplifier, wherein the transadmittance-transimpedance amplifier comprises: 
 
       a transimpedance stage, wherein the transimpedance stage comprises:
 a third current source; 
 a differential push-pull amplifier comprising a first set of push-pull transistors and a second set of push-pull transistors; 
 a pair of feedback resistors comprising a first and a second feedback resistor, wherein the first feedback resistor is coupled between an inverting output port of the transimpedance stage and the inverting output port of the transadmittance amplifier; and 
 the second feedback resistor is coupled between a non-inverting output port of the transimpedance stage and the non-inverting output port of the transadmittance amplifier. 
 
     
     
       12. The design structure of  claim 11 , wherein the transadmittance amplifier is configured with a predefined ratio of the first current intensity to the second current intensity. 
     
     
       13. The design structure of  claim 11 , wherein the predefined ratio of the first current intensity to the second current intensity is in a range between 2 and 8. 
     
     
       14. The design structure of  claim 11 , wherein
 the current intensity of the second biasing current is a fraction 1/N of the current intensity of the first biasing current, wherein N is a real number; 
 a transconductance value g m2  of the third and the fourth transistor is a fraction 1/N of a transconductance value g m1  of the first and the second transistor; and 
 the first and the second current mirror are configured to mirror the output current of the fourth and the third transistor respectively with a mirror ratio of 1:N. 
 
     
     
       15. The design structure of  claim 11 , wherein the first, the second, the third and the fourth transistor are embodied as field effect transistors.