US10057093B2ActiveUtilityA1
Using common mode local oscillator termination in single-ended commutating circuits for conversion gain improvement
Est. expiryJun 29, 2036(~9.9 yrs left)· nominal 20-yr term from priority
H03D 7/12H04L 27/20H03C 3/02H03C 3/245H03D 7/1433
51
PatentIndex Score
0
Cited by
14
References
17
Claims
Abstract
A commutating circuit includes a single-ended mixer and a passive network. The single-ended mixer includes a differential local oscillator terminal. The passive network includes a plurality of inductors and a capacitor. The plurality of inductors can be coupled to the differential local oscillator terminal. The plurality of inductors can provide an impedance in accordance with a common mode or a differential mode. The commutating circuit can be implemented via a device, a system and/or a method.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1. A commutating circuit, comprising:
a single-ended mixer comprising a differential local oscillator terminal; and
a passive network comprising a plurality of inductors and a capacitor;
wherein the plurality of inductors is coupled to the differential local oscillator terminal and provides an impedance in accordance with a common mode or a differential mode.
2. The commutating circuit of claim 1 , wherein the plurality of inductors include first and second inductors.
3. The commutating circuit of claim 2 , wherein the passive network is formed with a first terminal of the capacitor coupled to each of the plurality of inductors and a second end of the capacitor coupled to a signal ground.
4. The commutating circuit of claim 1 , wherein the capacitor comprises a shunt capacitor.
5. The commutating circuit of claim 1 , wherein the passive network comprises a reactive passive network.
6. The commutating circuit of claim 1 , wherein the passive network is included in a matching network of the commutating circuit for a differential local oscillator input signal.
7. The commutating circuit of claim 1 , wherein the single-ended mixer comprises a binary phase-shift keying modulator.
8. The commutating circuit of claim 1 , wherein the single-ended mixer comprises a quadrature phase-shift keying modulator.
9. The commutating circuit of claim 1 , wherein the single-ended mixer comprises a doubler circuit.
10. A device, comprising:
a commutating circuit comprising:
a single-ended mixer comprising a differential local oscillator terminal; and
a passive network comprising a plurality of inductors and a capacitor,
wherein the plurality of inductors is coupled to the differential local oscillator terminal and provides an impedance in accordance with a common mode or a differential mode.
11. The device of claim 10 , wherein the plurality of inductors include first and second inductors.
12. The device of claim 11 , wherein the passive network is formed with a first terminal of the capacitor coupled to each of the plurality of inductors and a second end of the capacitor coupled to a signal ground.
13. The device of claim 10 , wherein the capacitor comprises a shunt capacitor.
14. The device of claim 10 , wherein the passive network comprises a reactive passive network.
15. The device of claim 10 , wherein the passive network is included in a matching network of the commutating circuit for a differential local oscillator input signal.
16. A method of improving a conversion gain of a commutating device comprising a single-ended mixer comprising a differential local oscillator terminal, the method comprising:
receiving an input signal from a local oscillator buffer of the commutating device by a pair of switching devices of the commutating device; and
providing an impedance in accordance with the input signal by a plurality of inductors of a passive network to improve the conversion gain of the commutating device, the plurality of inductors being coupled to the differential local oscillator terminal,
wherein the input signal comprises a common mode input signal or a differential mode.
17. The method of claim 16 , wherein one of the plurality of inductors tunes out an input capacitive impedance of the pair of switching devices.Join the waitlist — get patent alerts
Track US10057093B2 — get alerts on status changes and closely related new filings.
We store only your email — no account needed. See our privacy policy.