US10049897B2ActiveUtilityA1
Extrusion-resistant solder interconnect structures and methods of forming
Est. expirySep 11, 2032(~6.2 yrs left)· nominal 20-yr term from priority
Inventors:Timothy H. DaubenspeckJeffrey P. GambinoChristopher D. MuzzyWolfgang SauterTimothy D. Sullivan
H10W 72/953H10W 72/952H10W 72/29H10W 72/942H10W 72/9415H10W 72/923H10W 74/15H10W 70/69H10W 72/253H10W 72/222H10W 72/252H10W 72/242H10W 72/224H10W 72/012H10W 90/701H10W 74/147H10W 74/012H10W 74/127H10W 74/114H10W 72/30H10W 72/20H10W 72/013H01L 2224/13147H01L 24/73H01L 2224/05147H01L 2224/0401H01L 24/16H01L 2224/05181H01L 2224/13082H01L 23/3121H01L 24/11H01L 23/3142H01L 2924/14H01L 2924/00014H01L 24/05H01L 2224/05024H01L 2224/131H01L 2224/05681H01L 2224/13076H01L 2224/13078H01L 2224/13166H01L 2924/01074H01L 2224/05666H01L 24/32H01L 2224/05082H01L 2924/04941H01L 24/27H01L 2224/73204H01L 2224/05655H01L 2224/73104H01L 2224/11912H01L 2224/05613H01L 2224/05124H01L 2224/024H01L 2224/13144H01L 2224/05647H01L 2224/05113H01L 2224/13139H01L 24/13H01L 2924/0132H01L 2224/13181H01L 2224/13155H01L 2924/014H01L 2224/05155H01L 2224/05186H01L 21/563H01L 2224/05166H01L 2224/13023H01L 2924/07025H01L 23/49811H01L 2224/05184H01L 2224/13113H01L 2224/13124H01L 2224/13186H01L 2224/05686H01L 2924/04953H01L 2224/13184H01L 2224/05023H01L 23/3192
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Cited by
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References
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Claims
Abstract
Various embodiments include methods of forming interconnect structures, and the structures formed by such methods. In one embodiment, an interconnect structure can include: a photosensitive polyimide (PSPI) layer including a pedestal portion; a controlled collapse chip connection (C4) bump overlying the pedestal portion of the PSPI layer; a solder overlying the C4 bump and contacting a side of the C4 bump; and an underfill layer abutting the pedestal portion of the PSPI and the C4 bump, wherein the underfill layer and the solder form a first interface separated from the PSPI pedestal.
Claims
exact text as granted — not AI-modifiedWe claim:
1. An interconnect structure comprising:
a photosensitive polyimide (PSPI) layer including a pedestal portion;
a controlled collapse chip connection (C4) bump overlying the pedestal portion of the PSPI layer, the C4 bump including:
a pad;
a ball limiting metallurgy (BLM) layer over the pad; and
a thick copper layer over the BLM layer;
a solder overlying the thick copper layer and directly contacting a side of the thick copper layer and a side of the BLM layer, wherein a gap is located between the solder and the pedestal portion; and
an underfill layer directly contacting the pedestal portion of the PSPI and the solder, wherein the underfill layer and the solder form a first interface separated from the pedestal portion, and wherein the underfill and the pedestal portion form a second interface, wherein the first interface and the second interface are separated by the gap.
2. The interconnect structure of claim 1 , wherein the solder is completely isolated from the PSPI layer.
3. The interconnect structure of claim 1 , wherein the underfill layer includes PSPI.
4. The interconnect structure of claim 1 , further comprising a nitride layer beneath the PSPI layer.
5. The interconnect structure of claim 4 , wherein the underfill directly contacts the nitride layer.
6. An interconnect structure comprising:
a photosensitive polyimide (PSPI) layer including a pedestal portion;
a controlled collapse chip connection (C4) bump overlying the pedestal portion of the PSPI layer, wherein the C4 bump includes:
a pad;
a ball limiting metallurgy (BLM) layer over the pad; and
a thick copper layer over the BLM layer;
a solder overlying the C4 bump and directly contacting a side of the C4 bump, wherein the solder is completely isolated from the PSPI layer, wherein a gap is located between the solder and the pedestal portion; and
an underfill layer abutting the pedestal portion of the PSPI and the C4 bump, wherein the underfill layer and the solder form a first interface separated from the pedestal portion, and wherein the underfill and the pedestal portion form a second interface, wherein the first interface and the second interface are separated by the gap.
7. The interconnect structure of claim 6 , wherein the solder overlies the thick copper layer and directly contacts a side of the thick copper layer, and wherein the solder directly contacts a side of the BLM layer.
8. The interconnect structure of claim 6 , wherein the underfill layer includes PSPI.
9. The interconnect structure of claim 6 , further comprising a nitride layer beneath the PSPI layer, wherein the underfill directly contacts the nitride layer.Join the waitlist — get patent alerts
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