Inventor · disambiguated record
Yoshitomo Numaguchi
Also filed as: NUMAGUCHI YOSHITOMO
2 granted patents·1 pending application·1 citations·filing 1999–2011
33Inventor score
Top patents by PatentIndex Score
3 records- 0130US8093927B2Semiconductor device including a test circuit of a multivalued logic circuit having an impedance controlNUMAGUCHI YOSHITOMO·Filed 2009·Granted Jan 10, 2012·0 cites·11 claims
- 0227US2012086478A1Semiconductor device including a test circuit of a multivalued logic circuit having an impedance controlNUMAGUCHI YOSHITOMO·Filed 2011·Application pending·0 cites
- 0316US6275784B1Design method of routing signal lines between circuit blocks for equalizing characteristics of circuit blocks and semiconductor integrated circuit device designed therethroughNEC CORP·Filed 1999·Granted Aug 14, 2001·1 cites·27 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →