Inventor · disambiguated record
Shuaibin Lin
Also filed as: LIN SHUAIBIN
9 granted patents·264 citations·filing 2000–2002
90Inventor score
Files withLSI LOGIC CORP9
Top patents by PatentIndex Score
9 records- 0189US7043416B1System and method for state restoration in a diagnostic module for a high-speed microprocessorLSI LOGIC CORP·Filed 2001·Granted May 9, 2006·72 cites·18 claims
- 0289US6594748B1Methods and structure for pipelined read return control in a shared RAM controllerLSI LOGIC CORP·Filed 2001·Granted Jul 15, 2003·68 cites·17 claims
- 0383US6615326B1Methods and structure for sequencing of activation commands in a high-performance DDR SDRAM memory controllerLSI LOGIC CORP·Filed 2001·Granted Sep 2, 2003·40 cites·12 claims
- 0474US6741522B1Methods and structure for using a higher frequency clock to shorten a master delay lineLSI LOGIC CORP·Filed 2001·Granted May 25, 2004·22 cites·10 claims
- 0571US6622216B1Bus snooping for cache coherency for a bus without built-in bus snooping capabilitiesLSI LOGIC CORP·Filed 2001·Granted Sep 16, 2003·18 cites·21 claims
- 0669US6715024B1Multi-bank memory device having a 1:1 state machine-to-memory bank ratioLSI LOGIC CORP·Filed 2001·Granted Mar 30, 2004·16 cites·34 claims
- 0767US6633969B1Instruction translation system and method achieving single-cycle translation of variable-length MIPS16 instructionsLSI LOGIC CORP·Filed 2000·Granted Oct 14, 2003·14 cites·34 claims
- 0851US6483753B1Endianess independent memory interfaceLSI LOGIC CORP·Filed 2002·Granted Nov 19, 2002·7 cites·13 claims
- 0950US6587390B1Memory controller for handling data transfers which exceed the page width of DDR SDRAM devicesLSI LOGIC CORP·Filed 2001·Granted Jul 1, 2003·7 cites·16 claims
Join the waitlist — get patent alerts
Get an alert when Shuaibin Lin files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →