Inventor · disambiguated record
Kwang-Tatt Loo
Also filed as: LOO KWANG TATT
1 granted patent·1 pending application·9 citations·filing 2007–2016
31Inventor score
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2 records- 0177US10445457B1Methods, systems, and articles of manufacture for implementing a physical design of an electronic design with DFM and design specification awarenessCADENCE DESIGN SYSTEMS INC·Filed 2016·Granted Oct 15, 2019·9 cites·20 claims
- 0216US2009002059A1Rail to rail full complementary CMOS isolation gateLOO KWANG TATT·Filed 2007·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →