Inventor · disambiguated record
Keiichi Ohno
Also filed as: OHNO KEIICHI
6 granted patents·175 citations·filing 1998–2005
85Inventor score
Files withSONY CORP6
Top patents by PatentIndex Score
6 records- 0189US6518130B1Method for forming a semiconductor device having a DRAM region and a logic region on the substrateSONY CORP·Filed 2000·Granted Feb 11, 2003·71 cites·7 claims
- 0276US6051462AProcess for producing semiconductor device comprising a memory element and a logic elementSONY CORP·Filed 1998·Granted Apr 18, 2000·43 cites·6 claims
- 0375US6965139B2Semiconductor device and method of manufacturingSONY CORP·Filed 2000·Granted Nov 15, 2005·35 cites·4 claims
- 0457US6501119B1Semiconductor memory device and method of producing sameSONY CORP·Filed 1999·Granted Dec 31, 2002·21 cites·6 claims
- 0553US7247902B2Semiconductor device and method of manufacturing the sameSONY CORP·Filed 2005·Granted Jul 24, 2007·4 cites·6 claims
- 0642US6642101B2Semiconductor memory device and method of producing sameSONY CORP·Filed 2002·Granted Nov 4, 2003·1 cites·7 claims
Join the waitlist — get patent alerts
Get an alert when Keiichi Ohno files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →