Inventor · disambiguated record
Iain Singleton
Also filed as: SINGLETON IAIN
26 granted patents·4 pending applications·19 citations·filing 2015–2025
94Inventor score
Files withIMAGINATION TECH LTD30
Top patents by PatentIndex Score
30 records- 0190US10331831B2Assessing performance of a hardware design using formal evaluation logicIMAGINATION TECH LTD·Filed 2016·Granted Jun 25, 2019·5 cites·19 claims
- 0288US10346571B2Livelock detection in a hardware design using formal evaluation logicIMAGINATION TECH LTD·Filed 2016·Granted Jul 9, 2019·4 cites·18 claims
- 0387US11467840B2Livelock recovery circuit for detecting illegal repetition of an instruction and transitioning to a known stateIMAGINATION TECH LTD·Filed 2020·Granted Oct 11, 2022·2 cites·19 claims
- 0485US2025111115A1Assessing performance of a hardware design using formal evaluation logicIMAGINATION TECH LTD·Filed 2024·Application pending·0 cites
- 0584US2024411972A1Detecting out-of-bounds violations in a hardware design using formal verificationIMAGINATION TECH LTD·Filed 2024·Application pending·0 cites
- 0683US11030039B2Out-of-bounds recovery circuitIMAGINATION TECH LTD·Filed 2020·Granted Jun 8, 2021·1 cites·20 claims
- 0783US2024330553A1Livelock detection in a hardware design using formal evaluation logicIMAGINATION TECH LTD·Filed 2024·Application pending·0 cites
- 0882US10936775B2Detecting out-of-bounds violations in a hardware design using formal verificationIMAGINATION TECH LTD·Filed 2020·Granted Mar 2, 2021·1 cites·20 claims
- 0981US12093621B2Detecting out-of-bounds violations in a hardware design using formal verificationIMAGINATION TECH LTD·Filed 2023·Granted Sep 17, 2024·0 cites·20 claims
- 1080US10552155B2Livelock recovery circuit configured to detect illegal repetition of an instruction and transition to a known stateIMAGINATION TECH LTD·Filed 2016·Granted Feb 4, 2020·2 cites·18 claims
- 1179US12271259B2Out-of-bounds recovery circuitIMAGINATION TECH LTD·Filed 2023·Granted Apr 8, 2025·0 cites·20 claims
- 1279US11250927B2Formal verification tool to verify hardware design of memory unitIMAGINATION TECH LTD·Filed 2020·Granted Feb 15, 2022·1 cites·20 claims
- 1379US10963611B2Assessing performance of a hardware design using formal evaluation logicIMAGINATION TECH LTD·Filed 2019·Granted Mar 30, 2021·1 cites·11 claims
- 1478US12175179B2Assessing performance of a hardware design using formal evaluation logicIMAGINATION TECH LTD·Filed 2022·Granted Dec 24, 2024·0 cites·19 claims
- 1577US2025156267A1Out-of-Bounds Recovery CircuitIMAGINATION TECH LTD·Filed 2025·Application pending·0 cites
- 1676US12050849B2Livelock detection in a hardware design using formal evaluation logicIMAGINATION TECH LTD·Filed 2022·Granted Jul 30, 2024·0 cites·9 claims
- 1776US10817367B2Out-of-bounds recovery circuitIMAGINATION TECH LTD·Filed 2017·Granted Oct 27, 2020·1 cites·17 claims
- 1875US11663386B2Detecting out-of-bounds violations in a hardware design using formal verificationIMAGINATION TECH LTD·Filed 2022·Granted May 30, 2023·0 cites·20 claims
- 1974US11847456B2Livelock recovery circuit for detecting illegal repetition of an instruction and transitioning to a known stateIMAGINATION TECH LTD·Filed 2022·Granted Dec 19, 2023·0 cites·20 claims
- 2073US11593193B2Out-of-bounds recovery circuitIMAGINATION TECH LTD·Filed 2021·Granted Feb 28, 2023·0 cites·20 claims
- 2172US11250192B2Detecting out-of-bounds violations in a hardware design using formal verificationIMAGINATION TECH LTD·Filed 2021·Granted Feb 15, 2022·0 cites·20 claims
- 2272US10580511B2Hardware monitor to verify memory unitsIMAGINATION TECH LTD·Filed 2016·Granted Mar 3, 2020·1 cites·19 claims
- 2371US11531799B2Assessing performance of a hardware design using formal evaluation logicIMAGINATION TECH LTD·Filed 2021·Granted Dec 20, 2022·0 cites·19 claims
- 2471US11373025B2Livelock detection in a hardware design using formal evaluation logicIMAGINATION TECH LTD·Filed 2020·Granted Jun 28, 2022·0 cites·11 claims
- 2569US11948652B2Formal verification tool to verify hardware design of memory unitIMAGINATION TECH LTD·Filed 2022·Granted Apr 2, 2024·0 cites·20 claims
- 2666US10909289B2Livelock detection in a hardware design using formal evaluation logicIMAGINATION TECH LTD·Filed 2019·Granted Feb 2, 2021·0 cites·18 claims
- 2762US10755011B2Detecting out-of-bounds violations in a hardware design using formal verificationIMAGINATION TECH LTD·Filed 2017·Granted Aug 25, 2020·0 cites·17 claims
- 2850US10210119B2Arbiter verificationIMAGINATION TECH LTD·Filed 2017·Granted Feb 19, 2019·0 cites·20 claims
- 2949US9626465B2Arbiter verificationIMAGINATION TECH LTD·Filed 2015·Granted Apr 18, 2017·0 cites·17 claims
- 3040US10359825B2Dynamic power measurement using formalIMAGINATION TECH LTD·Filed 2016·Granted Jul 23, 2019·0 cites·16 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →