Inventor · disambiguated record
Ajay K. Ravi
Also filed as: RAVI AJAY K
6 granted patents·35 citations·filing 2006–2013
79Inventor score
Top patents by PatentIndex Score
6 records- 0181US8519763B2Integrated circuits with dual-edge clockingRAVI AJAY K·Filed 2010·Granted Aug 27, 2013·6 cites·21 claims
- 0281US8028260B1Determination of most critical timing paths in digital circuitsALTERA CORP·Filed 2008·Granted Sep 27, 2011·14 cites·20 claims
- 0381US7926019B1Common clock path pessimism analysis for circuit designs using clock tree networksALTERA CORP·Filed 2008·Granted Apr 12, 2011·12 cites·20 claims
- 0464US8205178B2Common clock path pessimism analysis for circuit designs using clock tree networksRAVI AJAY K·Filed 2011·Granted Jun 19, 2012·2 cites·20 claims
- 0554US7424692B1Methods to find worst-case setup and hold relationship for static timing analysisALTERA CORP·Filed 2006·Granted Sep 9, 2008·1 cites·25 claims
- 0653US8912834B2Integrated circuits with dual-edge clockingALTERA CORP·Filed 2013·Granted Dec 16, 2014·0 cites·21 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →