Inventor · disambiguated record
Han-Chung Lin
Also filed as: LIN HAN · LIN HAN C · LIN HAN-CHUNG
16 granted patents·2 pending applications·53 citations·filing 1997–2022
91Inventor score
Files withTAIWAN SEMICONDUCTOR MFG CO LTD6UNITED MICROELECTRONICS CORP4IMEC VZW3TAIWAN SEMICONDUCTOR MFG1TSAI YUNG-CHIH1
Top patents by PatentIndex Score
18 records- 0191US8552495B2Dummy gate for a high voltage transistor deviceTSAI YUNG-CHIH·Filed 2010·Granted Oct 8, 2013·12 cites·20 claims
- 0285US8524562B2Method for reducing Fermi-Level-Pinning in a non-silicon channel MOS deviceWANG WEI-E·Filed 2009·Granted Sep 3, 2013·11 cites·20 claims
- 0381US10672894B2Method of fabricating ferroelectric field-effect transistorIMEC VZW·Filed 2018·Granted Jun 2, 2020·3 cites·20 claims
- 0474US9196751B2Junction FET semiconductor device with dummy mask structures for improved dimension control and method for forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2013·Granted Nov 24, 2015·2 cites·20 claims
- 0570US9508605B2Dummy gate for a high voltage transistor deviceTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Nov 29, 2016·1 cites·20 claims
- 0668US9209183B2Dummy gate for a high voltage transistor deviceTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Dec 8, 2015·1 cites·20 claims
- 0767US7633130B2High-performance field effect transistors with self-assembled nanodielectricsUNIV NORTHWESTERN·Filed 2007·Granted Dec 15, 2009·2 cites·25 claims
- 0858US10243075B2Junction FET semiconductor device with dummy mask structures for improved dimension control and method for forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Mar 26, 2019·0 cites·20 claims
- 0954US9818866B2Junction FET semiconductor device with dummy mask structures for improved dimension control and method for forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Nov 14, 2017·0 cites·18 claims
- 1053US2022415713A1Metal Interconnects And Method Of Forming The SameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Application pending·0 cites
- 1148US6107175AMethod of fabricating self-aligned contactUNITED MICROELECTRONICS CORP·Filed 1998·Granted Aug 22, 2000·12 cites·22 claims
- 1247US11056376B2Removing an organic sacrificial material from a two-dimensional materialIMEC VZW·Filed 2019·Granted Jul 6, 2021·0 cites·16 claims
- 1346US11036911B2Charging prevention method and structureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Jun 15, 2021·0 cites·20 claims
- 1442US9691872B2III-V semiconductor device with interfacial layerIMEC VZW·Filed 2014·Granted Jun 27, 2017·0 cites·17 claims
- 1538US2008048216A1Apparatus and method of forming metal oxide semiconductor field-effect transistor with atomic layer deposited gate dielectricYE PEIDE D·Filed 2007·Application pending·0 cites
- 1632US6071769AMethod for forming a resistor load of a static random access memoryUNITED MICROELECTRONICS CORP·Filed 1997·Granted Jun 6, 2000·3 cites·15 claims
- 1730US5966604AMethod of manufacturing MOS components having lightly doped drain structuresUNITED MICROELECTRONICS CORP·Filed 1997·Granted Oct 12, 1999·3 cites·9 claims
- 1827US6001679AMethod for manufacturing polysilicon loadUNITED MICROELECTRONICS CORP·Filed 1998·Granted Dec 14, 1999·3 cites·19 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →