Inventor · disambiguated record
Serge Biesemans
Also filed as: BIESEMANS SERGE
4 granted patents·4 pending applications·29 citations·filing 2003–2024
73Inventor score
Top patents by PatentIndex Score
8 records- 0179US7504329B2Method of forming a Yb-doped Ni full silicidation low work function gate electrode for n-MOSFETIMEC INTER UNI MICRO ELECTR·Filed 2006·Granted Mar 17, 2009·11 cites·28 claims
- 0263US6884672B1Method for forming an electronic deviceIBM·Filed 2003·Granted Apr 26, 2005·11 cites·20 claims
- 0362US2025212494A1Method for Forming a Semiconductor StructureIMEC VZW·Filed 2024·Application pending·0 cites
- 0458US7302376B2Device modeling for proximity effectsIBM·Filed 2003·Granted Nov 27, 2007·7 cites·1 claims
- 0548US2008022237A1Device modeling for proximity effectsADLER ERIC·Filed 2007·Application pending·0 cites
- 0645US10438806B2Methods and system of using organosilicates as patterning filmsTOKYO ELECTRON LTD·Filed 2018·Granted Oct 8, 2019·0 cites·19 claims
- 0737US2007023849A1Method for forming a fully germano-silicided gate MOSFET and devices obtained thereofIMEC INTER UNI MICRO ELECTR·Filed 2006·Application pending·0 cites
- 0836US2008191286A1Methods for manufacturing a CMOS device with dual dielectric layersIMEC INTER UNI MICRO ELECTR·Filed 2008·Application pending·0 cites
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →