Inventor · disambiguated record
Kenneth A. Poteet
Also filed as: POTEET KENNETH A
21 granted patents·1,352 citations·filing 1989–1999
97Inventor score
Top patents by PatentIndex Score
21 records- 0198US5390149ASystem including a data processor, a synchronous dram, a peripheral device, and a system clockTEXAS INSTRUMENTS INC·Filed 1994·Granted Feb 14, 1995·237 cites·69 claims
- 0295US5678021AApparatus and method for a memory unit with a processor integrated thereinTEXAS INSTRUMENTS INC·Filed 1994·Granted Oct 14, 1997·518 cites·35 claims
- 0393US5228132AMemory module arranged for data and parity bitsTEXAS INSTRUMENTS INC·Filed 1991·Granted Jul 13, 1993·97 cites·2 claims
- 0493US5089993AMemory module arranged for data and parity bitsTEXAS INSTRUMENTS INC·Filed 1989·Granted Feb 18, 1992·78 cites·9 claims
- 0582US5587954ARandom access memory arranged for operating synchronously with a microprocessor and a system including a data processor, a synchronous DRAM, a peripheral device, and a system clockTEXAS INSTRUMENTS INC·Filed 1994·Granted Dec 24, 1996·31 cites·53 claims
- 0682US5535172ADual-port random access memory having reduced architectureALLIANCE SEMICONDUCTOR CORP·Filed 1995·Granted Jul 9, 1996·53 cites·16 claims
- 0781US5633832AReduced area word line driving circuit for random access memoryALLIANCE SEMICONDUCTOR CORP·Filed 1995·Granted May 27, 1997·50 cites·21 claims
- 0878US5532966ARandom access memory redundancy circuit employing fusible linksALLIANCE SEMICONDUCTOR CORP·Filed 1995·Granted Jul 2, 1996·42 cites·20 claims
- 0977US5410510AProcess of making and a DRAM standby charge pump with oscillator having fuse selectable frequenciesTEXAS INSTRUMENTS INC·Filed 1993·Granted Apr 25, 1995·39 cites·22 claims
- 1077US5402390AFuse selectable timing signals for internal signal generatorsTEXAS INSTRUMENTS INC·Filed 1993·Granted Mar 28, 1995·39 cites·18 claims
- 1177US5075572ADetector and integrated circuit device including charge pump circuits for high load conditionsTEXAS INSTRUMENTS INC·Filed 1991·Granted Dec 24, 1991·30 cites·6 claims
- 1272US5808959AStaggered pipeline access scheme for synchronous random access memoryALLIANCE SEMICONDUCTOR CORP·Filed 1996·Granted Sep 15, 1998·27 cites·10 claims
- 1370US5617555ABurst random access memory employing sequenced banks of local tri-state driversALLIANCE SEMICONDUCTOR CORP·Filed 1995·Granted Apr 1, 1997·30 cites·20 claims
- 1468US5559752ATiming control circuit for synchronous static random access memoryALLIANCE SEMICONDUCTOR CORP·Filed 1995·Granted Sep 24, 1996·28 cites·20 claims
- 1561US5808958ARandom access memory with latency arranged for operating synchronously with a micro processor and a system including a data processor, a synchronous DRAM, a peripheral device, and a system clockTEXAS INSTRUMENTS INC·Filed 1995·Granted Sep 15, 1998·13 cites·71 claims
- 1658US5912854AData processing system arranged for operating synchronously with a high speed memoryTEXAS INSTRUMENTS INC·Filed 1997·Granted Jun 15, 1999·11 cites·38 claims
- 1754US6088280AHigh-speed memory arranged for operating synchronously with a microprocessorTEXAS INSTRUMENTS INC·Filed 1999·Granted Jul 11, 2000·9 cites·27 claims
- 1849US5872742AStaggered pipeline access scheme for synchronous random access memoryALLIANCE SEMICONDUCTOR CORP·Filed 1998·Granted Feb 16, 1999·10 cites·22 claims
- 1937US5982694AHigh speed memory arranged for operating synchronously with a microprocessorTEXAS INSTRUMENTS INC·Filed 1996·Granted Nov 9, 1999·3 cites·59 claims
- 2035US5347184ADual receiver edge-triggered digital signal level detection systemTEXAS INSTRUMENTS INC·Filed 1992·Granted Sep 13, 1994·3 cites·8 claims
- 2132US5287311AMethod and apparatus for implementing ×2 parity DRAM for 16 bit systems from ×4 parity DRAMTEXAS INSTRUMENTS INC·Filed 1991·Granted Feb 15, 1994·4 cites·16 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →