Inventor · disambiguated record
Murshed Chowdhury
Also filed as: CHOWDHURY MURSHED · CHOWDHURY MURSHED M · CHOWDHURY MURSHED MAHMUD
42 granted patents·3 pending applications·930 citations·filing 2009–2020
98Inventor score
Files withSANDISK TECHNOLOGIES LLC24IBM9SANDISK TECHNOLOGIES INC6GLOBALFOUNDRIES INC3CHOWDHURY MURSHED M2
Top patents by PatentIndex Score
45 records- 0199US11195857B2Bonded three-dimensional memory devices and methods of making the same by replacing carrier substrate with source layerSANDISK TECHNOLOGIES LLC·Filed 2020·Granted Dec 7, 2021·7 cites·20 claims
- 0299US10629616B1Bonded three-dimensional memory devices and methods of making the same by replacing carrier substrate with source layerSANDISK TECHNOLOGIES LLC·Filed 2019·Granted Apr 21, 2020·143 cites·20 claims
- 0399US10355009B1Concurrent formation of memory openings and contact openings for a three-dimensional memory deviceSANDISK TECHNOLOGIES LLC·Filed 2018·Granted Jul 16, 2019·62 cites·10 claims
- 0498US10388666B1Concurrent formation of memory openings and contact openings for a three-dimensional memory deviceSANDISK TECHNOLOGIES LLC·Filed 2018·Granted Aug 20, 2019·19 cites·5 claims
- 0598US9972640B1Three-dimensional memory device with self-aligned drain side select gate electrodes and method of making thereofSANDISK TECHNOLOGIES LLC·Filed 2016·Granted May 15, 2018·65 cites·3 claims
- 0698US9972641B1Three-dimensional memory device having a multilevel drain select gate electrode and method of making thereofSANDISK TECHNOLOGIES LLC·Filed 2016·Granted May 15, 2018·68 cites·30 claims
- 0798US9698153B2Vertical NAND and method of making thereof using sequential stack etching and self-aligned landing padSANDISK TECHNOLOGIES INC·Filed 2016·Granted Jul 4, 2017·54 cites·11 claims
- 0898US9570463B1Multilevel memory stack structure with joint electrode having a collar portion and methods for manufacturing the sameSANDISK TECHNOLOGIES INC·Filed 2015·Granted Feb 14, 2017·104 cites·18 claims
- 0997US10490569B2Three-dimensional memory device and method of making the same using concurrent formation of memory openings and contact openingsSANDISK TECHNOLOGIES LLC·Filed 2018·Granted Nov 26, 2019·18 cites·17 claims
- 1097US10453854B2Three-dimensional memory device with thickened word lines in terrace regionSANDISK TECHNOLOGIES LLC·Filed 2017·Granted Oct 22, 2019·25 cites·11 claims
- 1197US10224407B2High voltage field effect transistor with laterally extended gate dielectric and method of making thereofSANDISK TECHNOLOGIES LLC·Filed 2017·Granted Mar 5, 2019·22 cites·16 claims
- 1297US9576975B2Monolithic three-dimensional NAND strings and methods of fabrication thereofSANDISK TECHNOLOGIES INC·Filed 2015·Granted Feb 21, 2017·81 cites·10 claims
- 1397US9397111B1Select gate transistor with single crystal silicon for three-dimensional memorySANDISK TECHNOLOGIES INC·Filed 2015·Granted Jul 19, 2016·39 cites·20 claims
- 1496US10840260B2Through-array conductive via structures for a three-dimensional memory device and methods of making the sameSANDISK TECHNOLOGIES LLC·Filed 2019·Granted Nov 17, 2020·16 cites·18 claims
- 1596US10727216B1Method for removing a bulk substrate from a bonded assembly of wafersSANDISK TECHNOLOGIES LLC·Filed 2019·Granted Jul 28, 2020·13 cites·20 claims
- 1696US9991280B2Multi-tier three-dimensional memory devices containing annular dielectric spacers within memory openings and methods of making the sameSANDISK TECHNOLOGIES LLC·Filed 2017·Granted Jun 5, 2018·40 cites·15 claims
- 1795US11018153B2Three-dimensional memory device containing alternating stack of source layers and drain layers and vertical gate electrodesSANDISK TECHNOLOGIES LLC·Filed 2019·Granted May 25, 2021·11 cites·20 claims
- 1895US10985169B2Three-dimensional device with bonded structures including a support die and methods of making the sameSANDISK TECHNOLOGIES LLC·Filed 2019·Granted Apr 20, 2021·14 cites·15 claims
- 1995US10515897B2Three-dimensional memory device containing hydrogen diffusion blocking structures and method of making the sameSANDISK TECHNOLOGIES LLC·Filed 2018·Granted Dec 24, 2019·14 cites·9 claims
- 2095US10461163B2Three-dimensional memory device with thickened word lines in terrace region and method of making thereofSANDISK TECHNOLOGIES LLC·Filed 2017·Granted Oct 29, 2019·14 cites·21 claims
- 2195US10121794B2Three-dimensional memory device having epitaxial germanium-containing vertical channel and method of making thereofSANDISK TECHNOLOGIES LLC·Filed 2016·Granted Nov 6, 2018·33 cites·18 claims
- 2293US10224104B2Three dimensional NAND memory device with common bit line for multiple NAND strings in each memory blockSANDISK TECHNOLOGIES INC·Filed 2016·Granted Mar 5, 2019·11 cites·21 claims
- 2392US10262945B2Three-dimensional array device having a metal containing barrier and method of making thereofSANDISK TECHNOLOGIES LLC·Filed 2017·Granted Apr 16, 2019·8 cites·20 claims
- 2490US10950626B2Three-dimensional memory device containing alternating stack of source layers and drain layers and vertical gate electrodesSANDISK TECHNOLOGIES LLC·Filed 2019·Granted Mar 16, 2021·13 cites·20 claims
- 2588US10748894B2Three-dimensional memory device containing bond pad-based power supply network for a source line and methods of making the sameSANDISK TECHNOLOGIES LLC·Filed 2019·Granted Aug 18, 2020·5 cites·20 claims
- 2686US8952460B2Germanium oxide free atomic layer deposition of silicon oxide and high-k gate dielectric on germanium containing channel for CMOS devicesIBM·Filed 2013·Granted Feb 10, 2015·7 cites·7 claims
- 2777US8941189B2Fin-shaped field effect transistor (finFET) structures having multiple threshold voltages (Vt) and method of formingIBM·Filed 2013·Granted Jan 27, 2015·4 cites·18 claims
- 2876US9991167B2Method and IC structure for increasing pitch between gatesGLOBALFOUNDRIES INC·Filed 2016·Granted Jun 5, 2018·2 cites·18 claims
- 2976US8114739B2Semiconductor device with oxygen-diffusion barrier layer and method for fabricating sameCHOWDHURY MURSHED M·Filed 2009·Granted Feb 14, 2012·6 cites·19 claims
- 3074US9379185B2Method of forming channel region dopant control in fin field effect transistorIBM·Filed 2014·Granted Jun 28, 2016·2 cites·14 claims
- 3173US10490568B2Three-dimensional memory device with self-aligned drain side select gate electrodes and method of making thereofSANDISK TECHNOLOGIES LLC·Filed 2018·Granted Nov 26, 2019·1 cites·20 claims
- 3271US8853792B2Transistors and semiconductor devices with oxygen-diffusion barrier layersCHOWDHURY MURSHED M·Filed 2012·Granted Oct 7, 2014·3 cites·10 claims
- 3368US9431485B2Formation of finFET junctionGLOBALFOUNDRIES INC·Filed 2014·Granted Aug 30, 2016·2 cites·16 claims
- 3467US8809152B2Germanium oxide free atomic layer deposition of silicon oxide and high-k gate dielectric on germanium containing channel for CMOS devicesBRODSKY MARYJANE·Filed 2011·Granted Aug 19, 2014·2 cites·26 claims
- 3566US9171758B2Method of forming transistor contactsIBM·Filed 2014·Granted Oct 27, 2015·2 cites·20 claims
- 3662US11127729B2Method for removing a bulk substrate from a bonded assembly of wafersSANDISK TECHNOLOGIES LLC·Filed 2020·Granted Sep 21, 2021·0 cites·14 claims
- 3758US10777570B2Multi-tier three-dimensional memory devices containing annular dielectric spacers within memory openings and methods of making the sameSANDISK TECHNOLOGIES LLC·Filed 2018·Granted Sep 15, 2020·0 cites·4 claims
- 3849US11552094B2Three-dimensional memory device having on-pitch drain select gate electrodes and method of making the sameSANDISK TECHNOLOGIES LLC·Filed 2020·Granted Jan 10, 2023·0 cites·10 claims
- 3948US10672907B2Channel region dopant control in fin field effect transistorIBM·Filed 2015·Granted Jun 2, 2020·0 cites·20 claims
- 4048US9190418B2Junction butting in SOI transistor with embedded source/drainIBM·Filed 2014·Granted Nov 17, 2015·0 cites·20 claims
- 4146US2016118391A1Deuterium anneal of semiconductor channels in a three-dimensional memory structureSANDISK TECHNOLOGIES INC·Filed 2014·Application pending·0 cites
- 4244US2015162438A1Memory device employing an inverted u-shaped floating gateIBM·Filed 2013·Application pending·0 cites
- 4342US8829616B2Method and structure for body contacted FET with reduced body resistance and source to drain contact leakageIBM·Filed 2012·Granted Sep 9, 2014·0 cites·34 claims
- 4442US2014106550A1Ion implantation tuning to achieve simultaneous multiple implant energiesIBM·Filed 2012·Application pending·0 cites
- 4538US9748235B2Gate stack for integrated circuit structure and method of forming sameGLOBALFOUNDRIES INC·Filed 2016·Granted Aug 29, 2017·0 cites·20 claims
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