Inventor · disambiguated record
Jih-Nung Lee
Also filed as: LEE JIH-NUNG
13 granted patents·5 pending applications·30 citations·filing 2004–2017
87Inventor score
Top patents by PatentIndex Score
18 records- 0187US9157957B1PLL status detection circuit and method thereofREALTEK SEMICONDUCTOR CORP·Filed 2015·Granted Oct 13, 2015·5 cites·21 claims
- 0277US10416233B2Electronic apparatus and control method thereofREALTEK SEMICONDUCTOR CORP·Filed 2017·Granted Sep 17, 2019·2 cites·20 claims
- 0373US8572444B2Memory apparatus and testing method thereofLEE JIH-NUNG·Filed 2010·Granted Oct 29, 2013·8 cites·13 claims
- 0464US8984354B2Test system which shares a register in different modesKUO SHUO-FEN·Filed 2012·Granted Mar 17, 2015·5 cites·14 claims
- 0564US7949919B2Microelectronic device and pin arrangement method thereofREALTEK SEMICONDUCTOR CORP·Filed 2008·Granted May 24, 2011·5 cites·14 claims
- 0662US8907709B1Delay difference detection and adjustment device and methodREALTEK SEMICONDUCTOR CORP·Filed 2014·Granted Dec 9, 2014·2 cites·10 claims
- 0762US8901917B2Element measurement circuit and method thereofCHEN YING-YEN·Filed 2012·Granted Dec 2, 2014·2 cites·15 claims
- 0854US9160322B2Clock edge detection device and methodREALTEK SEMICONDUCTOR CORP·Filed 2014·Granted Oct 13, 2015·1 cites·20 claims
- 0950US10234503B2Debugging method executed via scan chain for scan test and related circuitry systemREALTEK SEMICONDUCTOR CORP·Filed 2016·Granted Mar 19, 2019·0 cites·10 claims
- 1044US9568553B2Method of integrated circuit scan clock domain allocation and machine readable media thereofREALTEK SEMICONDUCTOR CORP·Filed 2013·Granted Feb 14, 2017·0 cites·13 claims
- 1143US10496505B2Integrated circuit test methodREALTEK SEMICONDUCTOR CORP·Filed 2017·Granted Dec 3, 2019·0 cites·10 claims
- 1242US9274543B2Estimation apparatus and method for estimating clock skewCHEN YING-YEN·Filed 2012·Granted Mar 1, 2016·0 cites·14 claims
- 1342US2014129885A1Scan clock generator and related method thereofREALTEK SEMICONDUCTOR CORP·Filed 2013·Application pending·0 cites
- 1441US2018052506A1Voltage and frequency scaling apparatus, system on chip and voltage and frequency scaling methodREALTEK SEMICONDUCTOR CORP·Filed 2017·Application pending·0 cites
- 1531US2012326701A1Configurable Process Variation Monitoring Circuit of Die and Monitoring Method ThereofCHEN YING-YEN·Filed 2012·Application pending·0 cites
- 1630US2009265592A1Memory device and test method thereofWU HSIANG-HUANG·Filed 2009·Application pending·0 cites
- 1728US8479060B2Memory with self-test function and method for testing the sameKUO SHUO-FEN·Filed 2011·Granted Jul 2, 2013·0 cites·10 claims
- 1826US2004233767A1Method and system of fault patterns oriented defect diagnosis for memoriesFiled 2004·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →