Inventor · disambiguated record
Reynaldo Corpuz Javier
Also filed as: JAVIER REYNALDO C · JAVIER REYNALDO CORPUZ
9 granted patents·11 pending applications·14 citations·filing 2001–2023
82Inventor score
Top patents by PatentIndex Score
20 records- 0188US9768098B2Packaged semiconductor device having stacked attached chips overhanging the assembly padTEXAS INSTRUMENTS INC·Filed 2016·Granted Sep 19, 2017·6 cites·8 claims
- 0285US9373569B1Flat no-lead packages with electroplated edgesTEXAS INSTRUMENTS INC·Filed 2015·Granted Jun 21, 2016·4 cites·9 claims
- 0373US2023377124A1Exposed pad integrated circuit packageTEXAS INSTRUMENTS INC·Filed 2023·Application pending·0 cites
- 0472US11769247B2Exposed pad integrated circuit packageTEXAS INSTRUMENTS INC·Filed 2021·Granted Sep 26, 2023·0 cites·21 claims
- 0572US9219019B2Packaged semiconductor devices having solderable lead surfaces exposed by grooves in package compoundTEXAS INSTRUMENTS INC·Filed 2014·Granted Dec 22, 2015·3 cites·5 claims
- 0669US9576886B1Flat no-lead packages with electroplated edgesTEXAS INSTRUMENTS INC·Filed 2016·Granted Feb 21, 2017·1 cites·7 claims
- 0763US10580723B2Flat no-lead packages with electroplated edgesTEXAS INSTRUMENTS INC·Filed 2019·Granted Mar 3, 2020·0 cites·20 claims
- 0854US10366947B2Flat no-lead packages with electroplated edgesTEXAS INSTRUMENTS INC·Filed 2017·Granted Jul 30, 2019·0 cites·8 claims
- 0952US2016181180A1Packaged semiconductor device having attached chips overhanging the assembly padTEXAS INSTRUMENTS INC·Filed 2014·Application pending·0 cites
- 1051US11195269B2Exposed pad integrated circuit packageTEXAS INSTRUMENTS INC·Filed 2015·Granted Dec 7, 2021·0 cites·15 claims
- 1151US2015262918A1Structure and method of packaged semiconductor devices with bent-lead qfn leadframesTEXAS INSTRUMENTS INC·Filed 2014·Application pending·0 cites
- 1245US2016005712A1Structure and method of packaged semiconductor devices with bent-lead qfn leadframesTEXAS INSTRUMENTS INC·Filed 2015·Application pending·0 cites
- 1343US2015262919A1Structure and method of packaged semiconductor devices with qfn leadframes having stress-absorbing protrusionsTEXAS INSTRUMENTS INC·Filed 2014·Application pending·0 cites
- 1442US2015014832A1Semiconductor Device Having Three Terminal Miniature PackageTEXAS INSTRUMENTS INC·Filed 2013·Application pending·0 cites
- 1540US2007296056A1Integrated Circuits Having Controlled InductancesTEXAS INSTRUMENTS INC·Filed 2006·Application pending·0 cites
- 1639US2009072373A1Packaged integrated circuits and methods to form a stacked integrated circuit packageJAVIER REYNALDO CORPUZ·Filed 2007·Application pending·0 cites
- 1737US2011248392A1Ball-Grid Array Device Having Chip Assembled on Half-Etched metal LeadframeTEXAS INSTRUMENTS INC·Filed 2010·Application pending·0 cites
- 1836US9721859B2Semi-hermetic semiconductor packageTEXAS INSTRUMENTS INC·Filed 2015·Granted Aug 1, 2017·0 cites·20 claims
- 1933US2016071788A1Packaged semiconductor devices having solderable lead surfaces exposed by grooves in package compoundTEXAS INSTRUMENTS INC·Filed 2015·Application pending·0 cites
- 2023US2002056347A1Method and system for cutting integrated circuit packagesFiled 2001·Application pending·0 cites
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