Inventor · disambiguated record
Steven R. Kunkel
Also filed as: KUNKEL STEVEN R · KUNKEL STEVEN RAYMOND
27 granted patents·1 pending application·642 citations·filing 1995–2014
96Inventor score
Technology areasG06F
Top patents by PatentIndex Score
28 records- 0195US8244988B2Predictive ownership control of shared memory computing system dataCANTIN JASON F·Filed 2009·Granted Aug 14, 2012·48 cites·19 claims
- 0293US7389388B2Data processing system and method for efficient communication utilizing an in coherency stateIBM·Filed 2005·Granted Jun 17, 2008·29 cites·8 claims
- 0391US6988186B2Shared resource queue for simultaneous multithreading processing wherein entries allocated to different threads are capable of being interspersed among each other and a head pointer for one thread is capable of wrapping around its own tail in order to access a free entryIBM·Filed 2001·Granted Jan 17, 2006·70 cites·12 claims
- 0490US8370584B2Predictive ownership control of shared memory computing system dataIBM·Filed 2012·Granted Feb 5, 2013·12 cites·22 claims
- 0589US6105051AApparatus and method to guarantee forward progress in execution of threads in a multithreaded processorIBM·Filed 1997·Granted Aug 15, 2000·148 cites·14 claims
- 0682US6049867AMethod and system for multi-thread switching only when a cache miss occurs at a second or higher levelIBM·Filed 1997·Granted Apr 11, 2000·110 cites·25 claims
- 0780US7716424B2Victim prefetching in a cache hierarchyIBM·Filed 2004·Granted May 11, 2010·33 cites·18 claims
- 0880US7360032B2Method, apparatus, and computer program product for a cache coherency protocol state that predicts locations of modified memory blocksIBM·Filed 2005·Granted Apr 15, 2008·9 cites·8 claims
- 0976US8161493B2Weighted-region cycle accounting for multi-threaded processor coresFLOYD MICHAEL S·Filed 2008·Granted Apr 17, 2012·8 cites·18 claims
- 1076US8112587B2Shared data prefetching with memory region cache line monitoringCANTIN JASON F·Filed 2009·Granted Feb 7, 2012·7 cites·25 claims
- 1176US5651136ASystem and method for increasing cache efficiency through optimized data allocationIBM·Filed 1995·Granted Jul 22, 1997·91 cites·16 claims
- 1275US8397030B2Efficient region coherence protocol for clustered shared-memory multiprocessor systemsCANTIN JASON F·Filed 2008·Granted Mar 12, 2013·7 cites·20 claims
- 1373US6839816B2Shared cache line update mechanismIBM·Filed 2002·Granted Jan 4, 2005·19 cites·16 claims
- 1471US9280465B2Techniques for moving checkpoint-based high-availability log and data directly from a producer cache to a consumer cacheGLOBALFOUNDRIES INC·Filed 2013·Granted Mar 8, 2016·2 cites·15 claims
- 1571US8874853B2Local and global memory request predictorCANTIN JASON F·Filed 2010·Granted Oct 28, 2014·3 cites·23 claims
- 1670US8782646B2Non-uniform memory access (NUMA) enhancements for shared logical partitionsIBM·Filed 2012·Granted Jul 15, 2014·2 cites·12 claims
- 1763US7395376B2Method, apparatus, and computer program product for a cache coherency protocol state that predicts locations of shared memory blocksIBM·Filed 2005·Granted Jul 1, 2008·2 cites·8 claims
- 1860US6922753B2Cache prefetchingIBM·Filed 2002·Granted Jul 26, 2005·7 cites·16 claims
- 1957US7194586B2Method and apparatus for implementing cache state as history of read/write shared dataIBM·Filed 2002·Granted Mar 20, 2007·5 cites·15 claims
- 2056US9274952B2Moving checkpoint-based high-availability log and data directly from a producer cache to a consumer cacheGLOBALFOUNDRIES INC·Filed 2014·Granted Mar 1, 2016·0 cites·19 claims
- 2154US8490094B2Non-uniform memory access (NUMA) enhancements for shared logical partitionsANAND VAIJAYANTHIMALA K·Filed 2009·Granted Jul 16, 2013·0 cites·7 claims
- 2254US7747826B2Data processing system and method for efficient communication utilizing an in coherency stateIBM·Filed 2008·Granted Jun 29, 2010·0 cites·17 claims
- 2354US6728842B2Cache updating in multiprocessor systemsIBM·Filed 2002·Granted Apr 27, 2004·3 cites·21 claims
- 2452US7747825B2Method, apparatus, and computer program product for a cache coherency protocol state that predicts locations of shared memory blocksIBM·Filed 2008·Granted Jun 29, 2010·0 cites·8 claims
- 2552US7620776B2Method, apparatus, and computer program product for a cache coherency protocol state that predicts locations of modified memory blocksIBM·Filed 2007·Granted Nov 17, 2009·0 cites·10 claims
- 2650US7047365B2Cache line purge and update instructionIBM·Filed 2002·Granted May 16, 2006·1 cites·28 claims
- 2750US6314561B1Intelligent cache management mechanismIBM·Filed 1995·Granted Nov 6, 2001·26 cites·4 claims
- 2838US2003182539A1Storing execution results of mispredicted paths in a superscalar computer processorIBM·Filed 2002·Application pending·0 cites
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →