Inventor · disambiguated record
Udo Hartmann
Also filed as: HARTMANN UDO
18 granted patents·10 pending applications·134 citations·filing 1983–2011
93Inventor score
Top patents by PatentIndex Score
28 records- 0176USD281949SHaspMASTER LOCK CO·Filed 1983·Granted Dec 31, 1985·14 cites·1 claims
- 0272US7355911B2Semiconductor memory component and method for testing semiconductor memory components having a restricted memory area (partial good memories)INFINEON TECHNOLOGIES AG·Filed 2006·Granted Apr 8, 2008·8 cites·20 claims
- 0371US7088122B2Test arrangement for testing semiconductor circuit chipsINFINEON TECHNOLOGIES AG·Filed 2004·Granted Aug 8, 2006·20 cites·20 claims
- 0464US6903565B2Apparatus and method for the parallel and independent testing of voltage-supplied semiconductor devicesINFINEON TECHNOLOGIES AG·Filed 2003·Granted Jun 7, 2005·11 cites·22 claims
- 0563US4569545ALaminated haspMASTER LOCK CO·Filed 1983·Granted Feb 11, 1986·23 cites·4 claims
- 0661US6836137B2Configuration for testing semiconductor devicesINFINEON TECHNOLOGIES AG·Filed 2003·Granted Dec 28, 2004·9 cites·22 claims
- 0756US6858447B2Method for testing semiconductor chipsINFINEON TECHNOLOGIES AG·Filed 2002·Granted Feb 22, 2005·7 cites·7 claims
- 0856US6774649B2Test system for conducting a function test of a semiconductor element on a wafer, and operating methodINFINEON TECHNOLOGIES AG·Filed 2002·Granted Aug 10, 2004·7 cites·8 claims
- 0956US6650577B2Integrated semiconductor memory having memory cells in a plurality of memory cell arrays and method for repairing such a memoryINFINEON TECHNOLOGIES AG·Filed 2001·Granted Nov 18, 2003·5 cites·7 claims
- 1054US6756699B2Device and method for calibrating the pulse duration of a signal sourceINFINEON TECHNOLOGIES AG·Filed 2002·Granted Jun 29, 2004·6 cites·20 claims
- 1150US6442063B2Integrated memory having memory cells with magnetoresistive memory effectINFINEON TECHNOLOGIES AG·Filed 2001·Granted Aug 27, 2002·6 cites·11 claims
- 1249US6968483B2Circuit and method for testing a data memoryINFINEON TECHNOLOGIES AG·Filed 2001·Granted Nov 22, 2005·6 cites·13 claims
- 1346US7382669B2Semiconductor memory component and method for testing semiconductor memory componentsINFINEON TECHNOLOGIES AG·Filed 2006·Granted Jun 3, 2008·1 cites·21 claims
- 1445US7454676B2Method for testing semiconductor chips using register setsINFINEON TECHNOLOGIES AG·Filed 2005·Granted Nov 18, 2008·2 cites·19 claims
- 1544US7124325B2Method and apparatus for internally trimming output drivers and terminations in semiconductor devicesINFINEON TECHNOLOGIES AG·Filed 2003·Granted Oct 17, 2006·7 cites·20 claims
- 1641US2013055650A1Modular Integrated Underground Utilities Enclosure and Distribution SystemHARTMANN UDO·Filed 2011·Application pending·0 cites
- 1741US2008129371A1Semiconductor device and trimming methodQIMONDA AG·Filed 2007·Application pending·0 cites
- 1839US7454662B2Integrated memory having a circuit for testing the operation of the integrated memory, and method for operating the integrated memoryINFINEON TECHNOLOGIES AG·Filed 2004·Granted Nov 18, 2008·2 cites·11 claims
- 1939US2007262782A1Method for compensation for a position change of a probe cardQIMONDA AG·Filed 2007·Application pending·0 cites
- 2037US2009079450A1Semiconductor test deviceQIMONDA AG·Filed 2008·Application pending·0 cites
- 2135US6750671B2Apparatus for testing semiconductor devicesINFINEON TECHNOLOGIES AG·Filed 2001·Granted Jun 15, 2004·0 cites·7 claims
- 2235US2008231293A1Device and method for electrical contacting for testing semiconductor devicesQIMONDA AG·Filed 2008·Application pending·0 cites
- 2333US2006236163A1Semiconductor memory component and method for testing semiconductor memory components having a restricted memory areaHARTMANN UDO·Filed 2006·Application pending·0 cites
- 2431US7461308B2Method for testing semiconductor chips by means of bit masksINFINEON TECHNOLOGIES AG·Filed 2005·Granted Dec 2, 2008·0 cites·22 claims
- 2531US2006156108A1Method for testing semiconductor chips using check bitsSTRACKE PATRIC·Filed 2005·Application pending·0 cites
- 2630US2002018360A1Integrated memory having memory cells with a magnetoresistive storage effectFiled 2001·Application pending·0 cites
- 2730US2002073367A1Method and integrated circuit for testing a memory having a number of memory banksFiled 2001·Application pending·0 cites
- 2829US2008238462A1Test device for semiconductor devicesQIMONDA AG·Filed 2008·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →