Inventor · disambiguated record
Peter Gregorius
Also filed as: GREGORIUS PETER
68 granted patents·24 pending applications·690 citations·filing 2002–2010
99Inventor score
Top patents by PatentIndex Score
92 records- 0196US7414917B2Re-driving CAwD and rD signal linesINFINEON TECHNOLOGIES·Filed 2005·Granted Aug 19, 2008·76 cites·9 claims
- 0296US7282999B2Method and device for generating a clock signal using a phase difference signal and a feedback signalINFINEON TECHNOLOGIES AG·Filed 2005·Granted Oct 16, 2007·41 cites·32 claims
- 0394US6700361B2Voltage regulator with a stabilization circuit for guaranteeing stabile operationINFINEON TECHNOLOGIES AG·Filed 2002·Granted Mar 2, 2004·59 cites·17 claims
- 0493US7221615B2Semiconductor memory chipINFINEON TECHNOLOGIES AG·Filed 2005·Granted May 22, 2007·30 cites·10 claims
- 0592US7339840B2Memory system and method of accessing memory chips of a memory systemINFINEON TECHNOLOGIES AG·Filed 2005·Granted Mar 4, 2008·30 cites·29 claims
- 0690US8031539B2Memory device and memory system comprising a memory device and a memory control deviceQIMONDA AG·Filed 2008·Granted Oct 4, 2011·22 cites·24 claims
- 0789US8015438B2Memory circuitQIMONDA AG·Filed 2007·Granted Sep 6, 2011·25 cites·21 claims
- 0889US7184360B2High-speed interface circuit for semiconductor memory chips and memory system including semiconductor memory chipsINFINEON TECHNOLOGIES AG·Filed 2005·Granted Feb 27, 2007·24 cites·32 claims
- 0988US8120958B2Multi-die memory, apparatus and multi-die memory stackBILGER CHRISTOPH·Filed 2007·Granted Feb 21, 2012·24 cites·13 claims
- 1087US7404050B2Method of operating a memory device, memory module, and a memory device comprising the memory moduleINFINEON TECHNOLOGIES AG·Filed 2005·Granted Jul 22, 2008·17 cites·30 claims
- 1186US7475187B2High-speed interface circuit for semiconductor memory chips and memory system including the sameINFINEON TECHNOLOGIES AG·Filed 2005·Granted Jan 6, 2009·19 cites·27 claims
- 1285US7173993B2Method for sampling phase controlINFINEON TECHNOLOGIES AG·Filed 2002·Granted Feb 6, 2007·45 cites·34 claims
- 1384US8041865B2Bus termination system and methodQIMONDA AG·Filed 2008·Granted Oct 18, 2011·14 cites·66 claims
- 1482US7848153B2High speed memory architectureQIMONDA AG·Filed 2008·Granted Dec 7, 2010·13 cites·30 claims
- 1580US7928525B2Integrated circuit with wireless connectionQIMONDA AG·Filed 2008·Granted Apr 19, 2011·10 cites·21 claims
- 1680US7292662B2Feed forward clock and data recovery unitINFINEON TECHNOLOGIES AG·Filed 2004·Granted Nov 6, 2007·26 cites·36 claims
- 1779US7095803B2Method of reconstructing data transmitted over a transmission path in a receiver and corresponding deviceINFINEON TECHNOLOGIES AG·Filed 2002·Granted Aug 22, 2006·25 cites·30 claims
- 1878US8914589B2Multi-port DRAM architecture for accessing different memory partitionsGREGORIUS PETER·Filed 2008·Granted Dec 16, 2014·10 cites·33 claims
- 1978US8305834B2Semiconductor memory with memory cell portions having different access speedsRICHTER MICHAEL·Filed 2010·Granted Nov 6, 2012·7 cites·14 claims
- 2073US7292631B2Feed forward equalizer and a method for analog equalization of a data signalINFINEON TECHNOLOGIES AG·Filed 2004·Granted Nov 6, 2007·13 cites·19 claims
- 2172US7325152B2Synchronous signal generatorINFINEON TECHNOLOGIES AG·Filed 2005·Granted Jan 29, 2008·8 cites·20 claims
- 2271US8495310B2Method and system including plural memory controllers and a memory access control bus for accessing a memory deviceGREGORIUS PETER·Filed 2008·Granted Jul 23, 2013·6 cites·28 claims
- 2371US7771206B2Horizontal dual in-line memory modulesQIMONDA AG·Filed 2008·Granted Aug 10, 2010·4 cites·34 claims
- 2465US7457391B2Clock and data recovery unitINFINEON TECHNOLOGIES AG·Filed 2004·Granted Nov 25, 2008·16 cites·31 claims
- 2565US7334150B2Memory module with a clock signal regeneration circuit and a register circuit for temporarily storing the incoming command and address signalsINFINEON TECHNOLOGIES AG·Filed 2004·Granted Feb 19, 2008·14 cites·17 claims
- 2665US7088976B2Device for reconstructing data from a received data signal and corresponding transceiverINFINEON TECHNOLOGIES AG·Filed 2002·Granted Aug 8, 2006·10 cites·16 claims
- 2764US8392779B2Interface voltage adjustment based on error detectionSCHNEIDER ANDREAS·Filed 2008·Granted Mar 5, 2013·5 cites·20 claims
- 2864US7908232B2Training connections in a memory arrangementQIMONDA AG·Filed 2007·Granted Mar 15, 2011·2 cites·26 claims
- 2961US7515075B1Data conversionQIMONDA AG·Filed 2007·Granted Apr 7, 2009·5 cites·23 claims
- 3061US7450649B2Current mode digital data transmitterINFINEON TECHNOLOGIES AG·Filed 2003·Granted Nov 11, 2008·7 cites·25 claims
- 3159US7245239B2Synchronous parallel/serial converterINFINEON TECHNOLOGIES AG·Filed 2006·Granted Jul 17, 2007·4 cites·23 claims
- 3257US8125812B2Method and device for transmitting outgoing useful signals and an outgoing clock signalSTREIBL MARTIN·Filed 2008·Granted Feb 28, 2012·2 cites·25 claims
- 3357US8108643B2Semiconductor memory chip and memory systemWALLNER PAUL·Filed 2005·Granted Jan 31, 2012·5 cites·12 claims
- 3456US8271827B2Memory system with extended memory density capabilityBILGER CHRISTOPH·Filed 2007·Granted Sep 18, 2012·1 cites·22 claims
- 3556US7304909B2Control unit for deactivating and activating the control signalsINFINEON TECHNOLOGIES AG·Filed 2006·Granted Dec 4, 2007·3 cites·16 claims
- 3656US7269093B2Generating a sampling clock signal in a communication block of a memory deviceINFINEON TECHNOLOGIES AG·Filed 2005·Granted Sep 11, 2007·3 cites·34 claims
- 3756US7180821B2Memory device, memory controller and memory system having bidirectional clock linesINFINEON TECHNOLOGIES AG·Filed 2004·Granted Feb 20, 2007·8 cites·13 claims
- 3856US7050340B1Semiconductor memory system and method for the transfer of write and read data signals in a semiconductor memory systemINFINEON TECHNOLOGIES AG·Filed 2004·Granted May 23, 2006·8 cites·19 claims
- 3956US6710603B2Overload protection circuit for line driversINFINEON TECHNOLOGIES AG·Filed 2002·Granted Mar 23, 2004·7 cites·21 claims
- 4054US7154809B2Method for measuring the delay time of a signal lineINFINEON TECHNOLOGIES AG·Filed 2004·Granted Dec 26, 2006·8 cites·11 claims
- 4154US7127061B2Line driver for digital signal transmissionINFINEON TECHNOLOGIES AG·Filed 2004·Granted Oct 24, 2006·2 cites·34 claims
- 4253US7391657B2Semiconductor memory chipINFINEON TECHNOLOGIES AG·Filed 2007·Granted Jun 24, 2008·2 cites·9 claims
- 4352US7633814B2Memory device and method of operating suchQIMONDA AG·Filed 2007·Granted Dec 15, 2009·2 cites·35 claims
- 4452US7212038B2Line driver for transmitting dataINFINEON TECHNOLOGIES AG·Filed 2002·Granted May 1, 2007·2 cites·18 claims
- 4552US7106812B2Device for the recovery of data from a received data signalINFINEON TECHNOLOGIES AG·Filed 2002·Granted Sep 12, 2006·1 cites·21 claims
- 4650US8161219B2Distributed command and address bus architecture for a memory module having portions of bus lines separately disposedBRUENNERT MICHAEL·Filed 2008·Granted Apr 17, 2012·0 cites·28 claims
- 4750US7864907B2Data receiver with clock recovery circuitQIMONDA AG·Filed 2007·Granted Jan 4, 2011·2 cites·24 claims
- 4850US7173877B2Memory system with two clock lines and a memory deviceINFINEON TECHNOLOGIES AG·Filed 2004·Granted Feb 6, 2007·6 cites·16 claims
- 4948US7646320B1Circuit with selectable data pathsQIMONDA AG·Filed 2008·Granted Jan 12, 2010·2 cites·25 claims
- 5047US8144755B2Method and apparatus for determining a skewBRUENNERT MICHAEL·Filed 2007·Granted Mar 27, 2012·0 cites·22 claims
Showing the top 50 of 92 patent records by PatentIndex Score.
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