Inventor · disambiguated record
Bechara F. Boury
Also filed as: BOURY BECHARA · BOURY BECHARA F · BOURY BECHARA FOUAD
18 granted patents·1,301 citations·filing 1991–2010
96Inventor score
Top patents by PatentIndex Score
18 records- 0191US5396602AArbitration logic for multiple bus computer systemIBM·Filed 1993·Granted Mar 7, 1995·164 cites·20 claims
- 0289US5450551ASystem direct memory access (DMA) support logic for PCI based computer systemIBM·Filed 1993·Granted Sep 12, 1995·140 cites·19 claims
- 0387US5381538ADMA controller including a FIFO register and a residual register for data buffering and having different operating modesIBM·Filed 1991·Granted Jan 10, 1995·130 cites·14 claims
- 0486US5548786ADynamic bus sizing of DMA transfersIBM·Filed 1994·Granted Aug 20, 1996·128 cites·10 claims
- 0579US5835738AAddress space architecture for multiple bus computer systemsIBM·Filed 1996·Granted Nov 10, 1998·118 cites·18 claims
- 0679US5499346ABus-to-bus bridge for a multiple bus information handling system that optimizes data transfers between a system bus and a peripheral busIBM·Filed 1993·Granted Mar 12, 1996·84 cites·15 claims
- 0779US5265211AArbitration control logic for computer system having dual bus architectureIBM·Filed 1992·Granted Nov 23, 1993·84 cites·26 claims
- 0876US5313627AParity error detection and recoveryIBM·Filed 1992·Granted May 17, 1994·71 cites·12 claims
- 0974US5644729ABidirectional data buffer for a bus-to-bus interface unit in a computer systemIBM·Filed 1994·Granted Jul 1, 1997·65 cites·11 claims
- 1072US5544346ASystem having a bus interface unit for overriding a normal arbitration scheme after a system resource device has already gained control of a busIBM·Filed 1994·Granted Aug 6, 1996·58 cites·11 claims
- 1169US5333274AError detection and recovery in a DMA controllerIBM·Filed 1991·Granted Jul 26, 1994·52 cites·15 claims
- 1264US5966728AComputer system and method for snooping date writes to cacheable memory locations in an expansion memory deviceIBM·Filed 1995·Granted Oct 12, 1999·45 cites·15 claims
- 1364US5621897AMethod and apparatus for arbitrating for a bus to enable split transaction bus protocolsIBM·Filed 1995·Granted Apr 15, 1997·48 cites·35 claims
- 1457US5619729APower management of DMA slaves with DMA trapsINTEL CORP·Filed 1996·Granted Apr 8, 1997·33 cites·34 claims
- 1556US5239631ACpu bus allocation controlIBM·Filed 1991·Granted Aug 24, 1993·31 cites·17 claims
- 1654US5301282AControlling bus allocation using arbitration holdIBM·Filed 1991·Granted Apr 5, 1994·26 cites·26 claims
- 1752US5673414ASnooping of I/O bus and invalidation of processor cache for memory data transfers between one I/O device and cacheable memory in another I/O deviceIBM·Filed 1994·Granted Sep 30, 1997·24 cites·17 claims
- 1835US9201801B2Computing device with asynchronous auxiliary execution unitBOURY BECHARA F·Filed 2010·Granted Dec 1, 2015·0 cites·25 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →