Inventor · disambiguated record
Yun Ling Tan
Also filed as: TAN YUN LING
17 granted patents·1 pending application·21 citations·filing 2002–2020
88Inventor score
Files withGLOBALFOUNDRIES SG PTE LTD10CHARTERED SEMICONDUCTOR MFG3RAO XUESONG2LEONG LUP SAN1POON DEBORA CHYIU HYIA1
Top patents by PatentIndex Score
18 records- 0173US7176094B2Ultra-thin gate oxide through post decoupled plasma nitridation annealCHARTERED SEMICONDUCTOR MFG·Filed 2002·Granted Feb 13, 2007·15 cites·15 claims
- 0269US8940637B2Method for forming through silicon via with wafer backside protectionLEONG LUP SAN·Filed 2012·Granted Jan 27, 2015·3 cites·11 claims
- 0367US8860142B2Method and apparatus to reduce thermal variations within an integrated circuit die using thermal proximity correctionGLOBALFOUNDRIES SG PTE LTD·Filed 2012·Granted Oct 14, 2014·2 cites·20 claims
- 0456US11742283B2Integrated thin film resistor and memory deviceGLOBALFOUNDRIES SG PTE LTD·Filed 2020·Granted Aug 29, 2023·0 cites·19 claims
- 0556US9230886B2Method for forming through silicon via with wafer backside protectionGLOBALFOUNDRIES SG PTE LTD·Filed 2014·Granted Jan 5, 2016·0 cites·17 claims
- 0654US11315876B2Thin film conductive material with conductive etch stop layerGLOBALFOUNDRIES SG PTE LTD·Filed 2020·Granted Apr 26, 2022·0 cites·19 claims
- 0751US11610837B2Via structures of passive semiconductor devicesGLOBALFOUNDRIES SG PTE LTD·Filed 2020·Granted Mar 21, 2023·0 cites·20 claims
- 0850US8853796B2High-K metal gate deviceTEH YOUNG WAY·Filed 2011·Granted Oct 7, 2014·1 cites·26 claims
- 0948US2008087958A1Semiconductor device with doped transistorCHARTERED SEMICONDUCTOR MFG·Filed 2007·Application pending·0 cites
- 1046US10784332B2Methods for producing integrated circuits with magnets and a wet etchant for the sameGLOBALFOUNDRIES SG PTE LTD·Filed 2018·Granted Sep 22, 2020·0 cites·18 claims
- 1146US7326609B2Semiconductor device and fabrication methodCHARTERED SEMICONDUCTOR MFG·Filed 2005·Granted Feb 5, 2008·0 cites·10 claims
- 1245US9548371B2Integrated circuits having nickel silicide contacts and methods for fabricating the sameGLOBALFOUNDRIES SG PTE LTD·Filed 2014·Granted Jan 17, 2017·0 cites·20 claims
- 1344US8293544B2Method and apparatus to reduce thermal variations within an integrated circuit die using thermal proximity correctionPOON DEBORA CHYIU HYIA·Filed 2008·Granted Oct 23, 2012·0 cites·16 claims
- 1440US8492236B1Step-like spacer profileRAO XUESONG·Filed 2012·Granted Jul 23, 2013·0 cites·20 claims
- 1538US10566441B2Methods of forming integrated circuits with solutions to interlayer dielectric void formation between gate structuresGLOBALFOUNDRIES SG PTE LTD·Filed 2018·Granted Feb 18, 2020·0 cites·11 claims
- 1638US10115625B2Methods for removal of hard maskGLOBALFOUNDRIES SG PTE LTD·Filed 2016·Granted Oct 30, 2018·0 cites·25 claims
- 1736US10410854B2Method and device for reducing contamination for reliable bond padsGLOBALFOUNDRIES SG PTE LTD·Filed 2017·Granted Sep 10, 2019·0 cites·10 claims
- 1836US8828858B2Spacer profile engineering using films with continuously increased etch rate from inner to outer surfaceRAO XUESONG·Filed 2012·Granted Sep 9, 2014·0 cites·11 claims
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