Inventor · disambiguated record
Bryan E. Veal
Also filed as: VEAL BRYAN · VEAL BRYAN E
19 granted patents·6 pending applications·81 citations·filing 2006–2018
93Inventor score
Top patents by PatentIndex Score
25 records- 0193US9910786B2Efficient redundant array of independent disks (RAID) write hole solutionsINTEL CORP·Filed 2015·Granted Mar 6, 2018·13 cites·25 claims
- 0287US10635598B2Memory-addressed maps for persistent storage deviceINTEL CORP·Filed 2018·Granted Apr 28, 2020·5 cites·25 claims
- 0387US7836195B2Preserving packet order when migrating network flows between coresINTEL CORP·Filed 2008·Granted Nov 16, 2010·18 cites·10 claims
- 0483US9569141B2Hash map support in a storage deviceINTEL CORP·Filed 2014·Granted Feb 14, 2017·6 cites·14 claims
- 0583US9317892B2Method and device to augment volatile memory in a graphics subsystem with non-volatile memoryVEAL BRYAN E·Filed 2011·Granted Apr 19, 2016·8 cites·20 claims
- 0678US9471448B2Performing an atomic write operation across multiple storage devicesINTEL CORP·Filed 2014·Granted Oct 18, 2016·5 cites·25 claims
- 0778US8984309B2Reducing network latency during low power operationMEMON MAZHAR I·Filed 2008·Granted Mar 17, 2015·7 cites·16 claims
- 0875US9710408B2Source core interrupt steeringINTEL CORP·Filed 2012·Granted Jul 18, 2017·3 cites·20 claims
- 0973US8938641B2Method and apparatus for synchronizing storage volumesINTEL CORP·Filed 2012·Granted Jan 20, 2015·3 cites·20 claims
- 1072US9645739B2Host-managed non-volatile memoryINTEL CORP·Filed 2014·Granted May 9, 2017·3 cites·18 claims
- 1166US8321615B2Source core interrupt steeringFOONG ANNIE·Filed 2009·Granted Nov 27, 2012·3 cites·18 claims
- 1265US7650488B2Communication between processor core partitions with exclusive read or write to descriptor queues for shared memory spaceINTEL CORP·Filed 2008·Granted Jan 19, 2010·3 cites·30 claims
- 1364US9054987B2Single instruction processing of network packetsINTEL CORP·Filed 2013·Granted Jun 9, 2015·1 cites·23 claims
- 1459US9460040B2Method, device and system for aggregation of shared address devicesVEAL BRYAN E·Filed 2011·Granted Oct 4, 2016·1 cites·27 claims
- 1556US10819638B2Reducing network latency during low power operationINTEL CORP·Filed 2017·Granted Oct 27, 2020·0 cites·14 claims
- 1656US8626955B2Directing packets to a processor unitVEAL BRYAN·Filed 2008·Granted Jan 7, 2014·2 cites·22 claims
- 1753US8493979B2Single instruction processing of network packetsVEAL BRYAN E·Filed 2008·Granted Jul 23, 2013·0 cites·30 claims
- 1852US2017220299A1Hash map support in a storage deviceINTEL CORP·Filed 2017·Application pending·0 cites
- 1951US9876720B2Reducing network latency during low power operationINTEL CORP·Filed 2015·Granted Jan 23, 2018·0 cites·20 claims
- 2046US9292213B2Maintaining at least one journal and/or at least one data structure by circuitryINTEL CORP·Filed 2013·Granted Mar 22, 2016·0 cites·21 claims
- 2143US2009086736A1Notification of out of order packetsFOONG ANNIE·Filed 2007·Application pending·0 cites
- 2242US2014281124A1System and method for caching a storage mediumVEAL BRYAN E·Filed 2013·Application pending·0 cites
- 2342US2009006521A1Adaptive receive side scalingVEAL BRYAN E·Filed 2007·Application pending·0 cites
- 2441US2008086575A1Network interface techniquesFOONG ANNIE·Filed 2006·Application pending·0 cites
- 2540US2018088978A1Techniques for Input/Output Access to Memory or Storage by a Virtual Machine or ContainerINTEL CORP·Filed 2016·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →